Search - Design Compiler

Search - Design Compiler - List

[Other resource] SPI接口AD转换器代码 DL : 0: SPI接口AD转换器代码本代码实现了对串行（SPI）接口的软件模拟这是在一个项目中要用到SPI接口的器件，调试成功，可以在WAVE下编译通过，可以直接调用 SPI接口AD转换器代码 2002/3/9 design by elven-SPI AD converter code of the source implementation of the serial (SPI) interface software simulation This is a project that will be used SPI interface devices, debug successful, the compiler through WAVE, and can directly call SPI AD converter code 2002/3/9 by design's Eleven
Date : 2008-10-13 Size : 1003byte User : 徐华
[Other resource] 数字锁相环设计源程序 DL : 2: PLL是数字锁相环设计源程序, 其中, Fi是输入频率(接收数据), 数字锁相技术在通信领域应用非常广泛，本例用VHDL描述了一个锁相环作为参考，源码已经调试过。编译器synplicty.Fo(Q5)是本地输出频率. 目的是从输入数据中提取时钟信号(Q5), 其频率与数据速率一致, 时钟上升沿锁定在数据的上升和下降沿上；顶层文件是PLL.GDF-digital phase-locked loop PLL design source, in which Fi is the input frequency (receive data), the digital technology in the field of communications is widely used, the cases described in VHDL as a PLL reference source has been tuned. Compiler synplicty.Fo (Q5) is the local output frequency. Objective is to extract data input clock signal (Q5), its frequency and data rate line, the clock rising edge of the data locked up and the descending; Top-level document is PLL.GDF
Date : 2008-10-13 Size : 118.55kb User : 杰轩
[Other resource] IIR带通滤波器设计 DL : 0: IIR带通滤波器设计,提供交互界面,JAVA编写,VJ编译-IIR band-pass filter design, interface, JAVA prepared, VJ compiler
Date : 2008-10-13 Size : 95.04kb User : 胡安
[Other resource] 汇编课设 DL : 0: 学分管理系统的分析，设计与实现.本程序在masm6.11下编译通过，用了少量386的汇编指令，运行时请输入密码hust.-credit management system analysis, design and implementation. The procedures under the masm6.11 compiler, with a small amount of the Series 386 instructions, running hust Please enter the password.
Date : 2008-10-13 Size : 1.06mb User : susu
[Other resource] ghdl-0.20 DL : 0: vhdl集成电路设计软件.需要用gcc-4.0.2版本编译.-VHDL IC design software. Require gcc - 4.0.2 compiler versions.
Date : 2008-10-13 Size : 997.06kb User : 蔡文彬
[Other resource] Interpreter and libraries DL : 0: Haskell编译器和库 Haskell是一种广谱语言，适合各种应用。他尤其适合需要高度可修改和维护的程序。大多数软件产品的生命期主要花费在规范，设计和维护而不是编程。函数式语言能很好的写能够真正执行（也可以测试和调试）的规范，该规范也就是最终程序的第一个原型。 -Haskell compiler and libraries Haskell is a broad-spectrum language, suitable for a variety of applications. In particular, he needs highly suitable for modification and maintenance procedures. The majority of software products mainly spent his life in the specifications, design and maintenance rather than programming. Language function can be good to write genuine implementation (also can test and debug) norms, the specification is the final procedures for the prototype.
Date : 2008-10-13 Size : 4mb User : 鲍军波
[Other resource] 非常经典的词法分析器 DL : 0: 一个VC写的非常不错的词法分析器，我的编译原理课程设计，仅供参考。-a VC was a very good lexical analyzer, I compiler theory curriculum design, for reference purposes only.
Date : 2008-10-13 Size : 42.51kb User : 吴少华
[Other resource] CypressCY7C63723C-CombiMouse DL : 0: 用CY7C63723设计的鼠标固件程序 chip.c - include file that defines CY7C63723 constants - combi.c - main source file - combi.hex - Intel hex file for programming a CY7C63723 microcontroller - combi.lst - output listing from c-compiler for use with the CYDB debugger - macros.h - defines macros used in combi.c - ps2defs.h - defines PS/2 interface constants - usb_desc.h - defines the USB descriptors - usbdefs.h - defines USB interface constants-CY7C63723 use the mouse firmware design procedures chip.c-include file that defines constants CY7C63723 - combi.c-main source file-combi.hex-Intel hex file for programming a microcontroller CY7C63723 - combi.lst-output listing from c-compiler for use with the CYDB debugger - macros.h-defines macros used in combi.c - ps2defs.h-defines PS / 2 interface constants - usb_desc.h-defines the USB descriptors - usbdefs.h-defines USB interface constants
Date : 2008-10-13 Size : 76.9kb User : 江辉
[Other resource] ycx DL : 0: 文件中包括电子琴、步进电机控制、电子钟等实用程序控制，已经通过了编译，适当设计编译环境、端口等相信会对该方面的朋友有帮助。-document include organ, stepper motor control, electronic bell practical programmed through a compiler, appropriate Design Compiler environment, ports, etc. I believe that the friends help.
Date : 2008-10-13 Size : 10.24kb User : 程承
[Other resource] DesignCompiler DL : 0: Design Compiler使用简要说明,说明了用这一工具进行综合的过程 -use Design Compiler brief statement, the use of this tool for integrated process
Date : 2008-10-13 Size : 1.25mb User : qindao
[Other resource] hm DL : 0: /* 程序名称： LL(1)文法分析程序 */ /* 程序用途：编译原理课程设计 */ /* 编写日期： 2006年6月29日 */ /* 实验题目：识别下列表达式 */ /* E->E+T|E-T|T */ /* T->T*F|T/F|F */ /* F->(E)|i */ -/ * process Name : LL (1) grammar analysis program * / / * process uses : Course Design Compiler Principle * / / * prepare Date : June 29, 2006 * / / * experimental topics : identify the following expression * / / * E -
Date : 2008-10-13 Size : 4.14kb User : 黄铭
[Other resource] C_software DL : 0: c语言程序设计编译工具。turboc2.0的安装版本。可以解压然后安装/-c Language Program Design Compiler tool. Turboc2.0 version of the installation. Decompression can then install /
Date : 2008-10-13 Size : 6.27mb User : 郭方
[Other resource] VerilogandVHDL DL : 0: Verilog and VHDL状态机设计，英文pdf格式 State machine design techniques for Verilog and VHDL Abstract : Designing a synchronous finite state Another way of organizing a state machine (FSM) is a common task for a digital logic only one logic block as shown in engineer. This paper will discuss a variety of issues regarding FSM design using Synopsys Design Compiler . Verilog and VHDL coding styles will be 2.0 Basic HDL coding presented. Different methodologies will be compared using real-world examples.-Verilog and VHDL state machine design, English pdf format State machine design techniques for Ve rilog and VHDL Abstract : Designing a synchronous finite state Another w ay of organizing a state machine (FSM) is a commo n task for a digital logic only one logic block as shown in engineer. This paper will discuss a var iety of issues regarding FSM design using Synop sys Design Compiler. Verilog and VHDL coding st yles will be 2.0 Basic HDL coding presented. Dif ferent methodologies will be compared using're al-world examples.
Date : 2008-10-13 Size : 111.3kb User : mingming
[Other resource] HJFGF DL : 0: 黄金分割法的源代码用于优化设计 Turbo 2.0 下编译-0.618 method of optimizing the source code for Turbo Design Compiler 2.0
Date : 2008-10-13 Size : 1.37kb User : 李冰
[Other resource] compiler design DL : 0: 英文版编译器设计：里面详细介绍啦C编译器的设计-English compiler design : inside details -- C Compiler Design
Date : 2008-10-13 Size : 1.16mb User : lisa
[Other resource] vc61667782466_newasp DL : 0: 语法词法分析器编译原理课程设计用vc++实现语法词法分析器-grammar lexical analyzer compiler theory of curriculum design using vc achieve grammar lexical analyzer
Date : 2025-12-16 Size : 240kb User : byf
[Other resource] hm DL : 0: /* 程序名称： LL(1)文法分析程序 */ /* 程序用途：编译原理课程设计 */ /* 编写日期： 2006年6月29日 */ /* 实验题目：识别下列表达式 */ /* E->E+T|E-T|T */ /* T->T*F|T/F|F */ /* F->(E)|i */ -/* process Name : LL (1) grammar analysis program*//* process uses : Course Design Compiler Principle*//* prepare Date : June 29, 2006*//* experimental topics : identify the following expression*//* E-
Date : 2025-12-16 Size : 4kb User : 黄铭
[Other resource] Compilerprogram DL : 0: 编译原理课程设计语法分析程序的LL（1）分析方法-compiler theory of curriculum design syntax analysis procedures LL (1) Analysis
Date : 2025-12-16 Size : 9kb User : 薛希
[Other resource] token DL : 0: 编译原理课程设计词法分析好东西多多支持哦-Principles of curriculum design compiler lexical analysis can support a good thing Oh
Date : 2025-12-16 Size : 2kb User : ouyangchangqi
[Other resource] 2008620_2636 DL : 0: 编译原理课程设计使用词法分析，语法分析将布尔表达式转换为逆波兰式-Course Design Compiler
Date : 2025-12-16 Size : 9kb User : yuanyuan

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