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[Program doc] PLL_PLV DL : 0: 锁相回路可视为一个输出相位和输入相位的回授系统用以同步输入参考讯号和回授后输出信号。并让其操作同样的频率。如(图一)所示，简单锁相回路[3,4]是由三个电路构成，分别为相位侦测器（Phase Detector）、回路滤波器（Loop Filter）、压控荡器（VCO）-phase-locked loop can be regarded as a phase output and input phase feedback system for synchronous reference input and feedback signals After the output signal. And allowed to operate the same frequency. If (Figure 1), the simple lock-loop [3,4] by the three circuit. for the detection phase (Phase Detector), loop filter (Loop Filter), VCO finishes (VCO)
Date : 2026-01-09 Size : 146kb User : 王浩
[Program doc] EET_2140_Module_14_s08_PLL DL : 0: This phase lock loop method the is often used to demodulate FM signals-This is phase lock loop method the is often used to demodulate FM signals
Date : 2026-01-09 Size : 581kb User : abubakr
[Program doc] sle4442 DL : 0: 基于SLE4442卡的门锁系统功能当插入SLE4442逻辑加密卡是密码正确单片机发出一个开锁信号给控制电路控制电路运转打开门锁-Based SLE4442 card lock system functions when SLE4442 logic encryption card is inserted into the correct password MCU sends an unlock signal to the control circuit controls the door lock circuit operation
Date : 2026-01-09 Size : 29kb User : 郑昇阳
[Program doc] ME060-508..A[1] DL : 0: 5.08接线端子带锁（不带锁）直插或弯脚封装-5.08 terminal locking (with no lock) in line or bending package
Date : 2026-01-09 Size : 668kb User : 武诚
[Program doc] lock DL : 0: 电子密码锁，北京邮电大学，数字电路综合实验，大三下学期-Electronic locks, Beijing University of Posts and Telecommunications, an integrated digital circuit test
Date : 2026-01-09 Size : 608kb User : 米彦
[Program doc] LOCK DL : 0: 电子密码锁，北京邮电大学，数字电路综合实验，大三下学期-Electronic locks, Beijing University of Posts and Telecommunications, an integrated digital circuit experiment, junior next semester
Date : 2026-01-09 Size : 2.37mb User : 米彦
[Program doc] qp_s1 DL : 0: 研究oqpsk的matlab程序.从simuink可以学习怎样锁定oqpsk信号-Research oqpsk matlab program simuink can learn how to lock oqpsk signal
Date : 2026-01-09 Size : 7kb User : zhengx
[Program doc] pll DL : 0: A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. While there are several differing types, it is easy to initially visualize as an electronic circuit consisting of a variable frequency oscillator and a phase detector. The oscillator generates a periodic signal. The phase detector compares the phase of that signal with the phase of the input periodic signal and adjusts the oscillator to keep the phases matched. Bringing the output signal back toward the input signal for comparison is called a feedback loop since the output is fed back toward the input forming a loop.-A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. While there are several differing types, it is easy to initially visualize as an electronic circuit consisting of a variable frequency oscillator and a phase detector. The oscillator generates a periodic signal. The phase detector compares the phase of that signal with the phase of the input periodic signal and adjusts the oscillator to keep the phases matched. Bringing the output signal back toward the input signal for comparison is called a feedback loop since the output is fed back toward the input forming a loop.
Date : 2026-01-09 Size : 11kb User : mojtaba
[Program doc] electronic-lock-Research- DL : 0: 新型无线遥控电子密码锁系统的研究,利用单片机和滚动码技术设计电子密码锁系统。-Research on the new type of wireless remote control electronic lock system, the use of single chip microcomputer and rolling code technology to design the electronic lock system.
Date : 2026-01-09 Size : 2.34mb User : freeboy