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[Software Engineering] fftfpga DL : 0: 采用按时间抽选的基4原位算法和坐标旋转数字式计算机（CORDIC）算法实现了一个FFT实时谱分析系统。整个设计采用流水线工作方式，保证了系统的速度，避免了瓶劲的出现；整个系统采用FPGA实现，实验表明，该系统既有DSP器件实现的灵活性又有专用FFT芯片实现的高速数据吞吐能力，可以广泛地应用于数字信号处理的各个领域。-time selected by using the in-situ-4 algorithm and coordinate rotation digital computer (CORDIC) algorithm is is a real-time FFT spectrum analysis system. The whole design flow work, to make sure that the speed of the system is to avoid the emergence of fresh bottle; the entire system using FPGA, the experiments show that The system established DSP device with the flexibility of dedicated FFT chips to achieve high-speed data throughput. can be widely applied to the digital signal processing in various fields.
Date : 2008-10-13 Size : 381.27kb User : yaoming
[Software Engineering] fftfpga DL : 0: 采用按时间抽选的基4原位算法和坐标旋转数字式计算机（CORDIC）算法实现了一个FFT实时谱分析系统。整个设计采用流水线工作方式，保证了系统的速度，避免了瓶劲的出现；整个系统采用FPGA实现，实验表明，该系统既有DSP器件实现的灵活性又有专用FFT芯片实现的高速数据吞吐能力，可以广泛地应用于数字信号处理的各个领域。-time selected by using the in-situ-4 algorithm and coordinate rotation digital computer (CORDIC) algorithm is is a real-time FFT spectrum analysis system. The whole design flow work, to make sure that the speed of the system is to avoid the emergence of fresh bottle; the entire system using FPGA, the experiments show that The system established DSP device with the flexibility of dedicated FFT chips to achieve high-speed data throughput. can be widely applied to the digital signal processing in various fields.
Date : 2025-12-31 Size : 381kb User : yaoming
[Software Engineering] huawei DL : 0: 华为FPGA设计流程指南，FPGA设计者、项目管理者必读的文档，看看别人是怎么做的。-Huawei FPGA design flow guide, FPGA designers, project managers must-read documents, take a look at how others do.
Date : 2025-12-31 Size : 31kb User : 贺雷
[Software Engineering] FPGA DL : 0: 几篇关于FPGA做视频项目论文,希望对大家有帮助-FPGA to do a few video projects on paper, in the hope that everyone has to help
Date : 2025-12-31 Size : 540kb User : hbsun
[Software Engineering] jiangx DL : 0: 基于FPGA的超高速FFT硬件实现蒙特卡洛仿真在移动通信中的应用研究等实现 -FPGA-based ultra-high-speed FFT hardware implementation of Monte Carlo simulation in mobile communication, such as applied research to achieve
Date : 2025-12-31 Size : 1.4mb User : nimaoqing
[Software Engineering] fpgafft DL : 1: :文章针对目前数字信号处理中大量采用的快速傅立叶变换[FFT] 算法采用软件编程来处理的应用现状,在对FFT 算法进行分析的基础上,给出了用FPGA[Field Programmable Gate Array] 实现的8 点32 位FFT 处理器方案,并得到了系统的仿真结果。最后在Altera 公司FLEX10K系列FPGA 芯片上成功地实现了综合。-Based on the analysis of the FFT algorithm , a reasonable logic structure for a 8-point ,32- bit FFT processor is described and the simulating result is given in this paper. The processor is implemented on the FLEX10Kfamily of FPGAs.
Date : 2025-12-31 Size : 215kb User : 王晓
[Software Engineering] FPGA_4FFT DL : 0: 针对高速数字信号处理的要求,提出用FPGA 实现基- 4FFT 算法,并对其整体结构、蝶形单元进行了分析. 采用蝶算单元输入并行结构和同址运算,能同时提供蝶形运算所需的4 个操作数,具有最大的数据并行性,能提高处理速度按照旋转因子存放规则,蝶形运算所需的3 个旋转因子地址相同,且寻址方式简单输出采取与输入相似的存储器运算单元同时采用3 个乘法的复数运算算法来实现.-In accordance with the requirements of high speed digital signal processing , the algorithmof radix O4 implemented with FPGA and the integrated architecture and butterfly unit are analyzed. With butterfly u2 nit input which is designed by parallel structure and the same address calculation , four operation codes the butterfly unit needs can be provided simultaneously to have the most data parallel and improve the speed of calculation. According to the rotation parameters memory regulation , the addresses of three rotation parame2 ters of butterfly unit are the same with simple style of address generation and similar input and output memo2 ries. The operating unit adopted is implemented by three complex calculation algorithm of multiplication si2 multaneously.
Date : 2025-12-31 Size : 352kb User : 王晓
[Software Engineering] FFT-IP DL : 0: 在FPGA上实现的fft，里面是一个fft的ip核，直接可以用，编译通过，能正常运行-In the FPGA to achieve the fft, there is a nuclear fft of ip, can be used directly, the compiler is passed, to the normal operation of
Date : 2025-12-31 Size : 55kb User : 无
[Software Engineering] TheResearchoftherealtimesignalprocessingofSARbased DL : 0: 3．完成系统的FPGA程序开发与调试，主要包括FFT，IFFT，CMUL和转置存储控制等模块，在此基础上，重点介绍了一种基于DDR SDRAM的行写行读高效转置存储算法，在采用该算法进行转置存储操作时，读写两端的速度相匹配，满足流水线操作要求，提高了整个系统的实时性。最后介绍了采用CORDIC算法实现复图像求模运算的方法，分析了算法的硬件实现结构，并给出了基于FPGA 的实现方法及仿真结果。-he FPGA s development and debugging are implemented,including FFT, IFFT, CMUL and C0ntrol of CTM．Based Oll this，Implementation of a high efficient corner turn memory arithmetic with writing and reading by row based on DDR SDRAM is introduced．When using CTM with this algorithm，me speed of reading and writing maItches and meets the requirement of pipelined operation．Finally a method of model implementation for complex image based on CORDIC algorithm is introduced．The algorithm’s hardware implementation structure is analysed, and implementation methodology and simulation results are given
Date : 2025-12-31 Size : 4.92mb User : mabeibei
[Software Engineering] FPGAFFT DL : 0: FPGA实现FFT的一些论文，介绍了算法的原理和FPGA上实现的步骤-FFT FPGA realization of a number of papers, the principle of the algorithm and the FPGA to achieve the steps
Date : 2025-12-31 Size : 1.4mb User : youhu
[Software Engineering] cf_fft_latest.tar DL : 0: fft code can be used for implementing on fpga boards
Date : 2025-12-31 Size : 2.98mb User : Misbahuddin
[Software Engineering] RAM-FPGA-FFT DL : 0: 内嵌RAM的种类，在FFT中的应用,以及仿真验证及应用-Types of embedded RAM, the FFT application
Date : 2025-12-31 Size : 123kb User : Dean
[Software Engineering] RADIX_64 DL : 0: radix 64 point fft using vhdl design in fpga
Date : 2025-12-31 Size : 124kb User : bowya
[Software Engineering] 128-Point-fft-ok DL : 0: 这是一个外文文档,在fft的设计方面有较大的改进,可以当作大家的参考-This is a file writed by english,which has been optimized in fft.It is a good choice for the ones who are working on dsp and fpga.
Date : 2025-12-31 Size : 292kb User : gaod
[Software Engineering] FFT-Using-FPGAs-(2) DL : 0: FPGA IMPLEMENTATION OF FPGA
Date : 2025-12-31 Size : 136kb User : nikhil
[Software Engineering] FPGA-DESIGN-OF-A-HARDWARE-EFFICIENT-PIPELINED-FFT DL : 0: The digital wideband receiver is a critical component in modern digital receivers. The receiver has the capability to expose and distinguish adverse signals contained within a large bandwidth (on the order of 1 GHz or more) of the radio frequency (RF) spectrum. The spectral estimator is a highly important design element imperative to the detection of the hostile signals within the intended bandwidth in order to fulfill mission requirements. This crucial element of an FFT-based digital receiver presented several challenges in the development of this research. The task at hand was to minimize the total hardware consumption contributed to the complex arithmetic operations while maintaining a high single signal spurious-free dynamic range (SFDR) and multi-tone instantaneous dynamic range (IDR).
Date : 2025-12-31 Size : 608kb User : asd
[Software Engineering] Design-and-Implementation-of-FPGA DL : 0: 设计与实现了一种以 F P GA 为核心的实时频谱分析系统。系统包含实时频谱监测和实时频谱仪 2 种频谱分析模式。实时频谱监测模式采用 F F T 算法设计实现 , 用于对信号的实时监测实时频谱仪模式采用 D F T 算法设计实现, 用于信号的细致分析。实验证明 , 系统充分利用了 F P GA 芯片的资源, 具有实时性好、频谱分析参数可调、多通道循环切换分析等特点。目前该系统已成功应用于 HFC 双向网络反向通道噪声的频谱分析和监测之中。-Design and Implementation of a kind FP GA as the core real-time spectrum analysis system. System includes real-time spectrum monitoring and real-time spectrum analyzer two kinds of spectrum analysis mode. Real-time spectrum monitoring mode using the FFT algorithm design and implementation for real-time monitoring of the signal real-time spectrum analyzer mode using DFT algorithm design and implementation, for a detailed analysis of the signal. Experimental results show that the system takes full advantage of FP GA chip resources, with real-time, spectral analysis parameters adjustable, multi-channel switching cycle analysis and so on. The spectral analysis of the current system has been successfully applied to a two-way HFC network and back-channel noise being monitored.
Date : 2025-12-31 Size : 213kb User : 张春竹
[Software Engineering] implement-of-fft-using-fpga DL : 0: fft的fpga实现，包含完整的ise工程文件和matlab代码以及说明文档-fft in fpga implementation ise project file contains the complete and matlab code, and documentation
Date : 2025-12-31 Size : 4mb User : wang
[Software Engineering] FFT-algorithm-Generator DL : 0: Actel FPGA FFT算法VHDL生成器,附说明。-Actel FPGA FFT algorithm VHDL Generator and introductions
Date : 2025-12-31 Size : 1.34mb User : john
[Software Engineering] fft_24bits DL : 0: 实现512点fft变换，对采集数据实时变换(512 point FFT transform, to collect data in real time transformation)
Date : 2025-12-31 Size : 12.52mb User : 任天天

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