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[Software Engineering] Aliasing DL : 0: C code for DSK 6713 for Aliasing Filtering
Date : 2025-12-25 Size : 12kb User : moh
[Software Engineering] DFT5486135412 DL : 0: 过采样近似完全重构 DFT 调制滤波器组的设计。首先,分析了传递函数和混叠传递函数的性质，给出了因果 FIR DFT 调制滤波器组的系统延迟与线性相位分析和综合原型滤波器阶数的关系。随后，过采样近似完全重构 DFT 调制滤波器组的设计问题被描述为一个非凸优化问题。-Near perfect reconstruction oversampled DFT modulated filter design. First, the analysis of the transfer function and Aliasing transfer function of the nature of the given causal FIR DFT modulated filter banks with linear phase delay of the system Analysis and synthesis prototype filter order relationship. Subsequently, the approximate perfect reconstruction oversampled DFT modulated filter Group design is described as a non-convex optimization problem.
Date : 2025-12-25 Size : 3.11mb User :
[Software Engineering] Proiect_final DL : 0: Implementation of the Anti-aliasing effect in C/C++
Date : 2025-12-25 Size : 366kb User : cioranel
[Software Engineering] aliasing DL : 0: alaisin concept in communication system
Date : 2025-12-25 Size : 147kb User : gillani
[Software Engineering] FT800_SampleApp_1.0 DL : 0: 英国FTDI公司二月发布了高级先进的图形控制器设备FT800, 在单个芯片上集成了显示器，音频和触摸。FT800让您的人机界面（HMI）突显：最低成本，最炫效果，最易开发。以下是超炫Demo(AVR-mega328 (8MHZ Clock) + FT800+WQVG(480*272) TFT) http://www.kickstarter.com/projects/2084212109/gameduino-2-this-time-its-personal -FTDI Chip is redefining the cost and quality paradigm for graphic user interface (GUI) development with the introduction of the FT800, Embedded Video Engine (EVE). With 3 in 1 functionality including display, audio, and touch operations, engineers now have an advanced solution to easily create and output state-of-the-art interactive display systems. QVGA and WQVGA resolution TFT displays with parallel RGB interface Dithering provides 24-bit (true colour) support on an 18-bit interface 256k internal object memory Store up to 2000 objects/commands in 8k byte display list Inbuilt controller supports 4-wire resistive touch panels PWM output for programmable display brightness Anti-aliasing support improves display perception Low-power- 35mA typical in active mode, and 10uA in sleep mode Widgets (innovation mechanisms) allow easy creation of complex objects Integrated audio output- play beeps, tones or recorded audio SPI or I2C interface to system microcontroller S
Date : 2025-12-25 Size : 2.56mb User : 陈诗建
[Software Engineering] fft--hunpin DL : 0: 频谱混叠的情况及原因，：当周期T一定时，抽样频率越大，其采样的时间间隔越短，图像越逼真-Aliasing circumstances and reasons: when the period T is constant, the larger the sampling frequency, the sampling interval shorter, more lifelike images
Date : 2025-12-25 Size : 497kb User : 李祥
[Software Engineering] CIC-filter DL : 0: 采用多级级联方法降低了对硬件运算速度的要求，有利于实时处理；采用余弦滤波器改善了阻带衰减不足；内插二阶多项式滤波器补偿了 CIC 滤波器通带内的衰减；抗混叠低通滤波器减小了混叠影响-Using multi-stage cascade approach reduces hardware requirements for computing speed, real-time processing in favor cosine filter improves the stop-band attenuation inadequate second-order polynomial interpolation filter compensates for the attenuation of the CIC filter passband anti- aliasing low-pass filter reduces the effects of aliasing
Date : 2025-12-25 Size : 725kb User : xin
[Software Engineering] TIVC5416 DL : 0: 基于TI VC5416的黑白图像采集之缩放实现包含最近领域插值双线性插值双三次插值超采样（supersampling）的反锯齿算法-Anti-aliasing algorithm scaling collection of black and white images based on TI VC5416 realize bilinear interpolation field contains recent bicubic oversampling (supersampling) o
Date : 2025-12-25 Size : 362kb User : 李伟
[Software Engineering] LMD DL : 0: 局部模态分解，具有良好的信号分解能力，不会产生模态混叠现象。-Local mode decomposition, has a good ability to decompose a signal, no modal aliasing.
Date : 2025-12-25 Size : 16kb User : lizhiming
[Software Engineering] fft_show DL : 0: 利用两个信号相加形成混叠信号，通过fft看他们在频谱中的结果-The use of two signals added to form aliasing, by fft to see their results in the spectrum
Date : 2025-12-25 Size : 1kb User : 周仁峰
[Software Engineering] sample DL : 0: 对连续时间正弦信号x(t) sin(2π t+ )，可以按抽样频率 1/ 对x(t)抽样来获得离散时间信号x[n] x(t) sin( ). 以不同的组合f0和fs绘出x[n],可以说明混叠问题。以下，去抽样频率fs 8kHZ. (a)绘出一个被抽样的正弦波单图。正弦波频率300Hz，10ms间隔上抽样，相位任意指定。使用stem绘图。 (b)使用plot绘图。 (c)将正弦波频率从100Hz变至475Hz，每次增加125Hz。绘图。 (d)将正弦波频率从7525Hz变至7900Hz，每次增加125Hz。绘图。 (e)将正弦波频率从32100Hz变至32475Hz，每次增加125Hz。绘图。讨论显现频率是增加还是减少 -For the continuous time sinusoidal signal x (t) sin (2π t+), the discrete time signal x [n] x (t) sin () can be obtained by sampling the sampling frequency 1/x (t). The x [n] is plotted with different combinations f0 and fs, which can explain the aliasing problem. Here, the sampling frequency fs 8kHZ. (A) Draw a sampled sine wave single graph. Sine wave frequency 300Hz, 10ms interval sampling, the phase specified arbitrarily. Use stem drawing. (B) use the plot plot. (C) change the sine wave frequency 100Hz to 475Hz, each increase 125Hz. Drawing. (D) change the sine wave frequency 7525Hz to 7900Hz, each increase 125Hz. Drawing. (E) change the sine wave frequency 32100Hz to 32475Hz, each increase 125Hz. Drawing. Discuss whether the apparent frequency is increased or decreased
Date : 2025-12-25 Size : 16kb User : 张丽丽