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[MiddleWare] cpld_laser DL : 0: 用cpld开发的激光控制器的源码，已经是成型产品，希望对大家有用-cpld developed using laser controller source, it is already shaping products, we hope to useful
Date : 2025-12-19 Size : 331kb User : 王石子
[MiddleWare] beipin_quartII DL : 0: 在FPGA或CPLD上实现的一中非常实用的倍频电路，只要输入频率高，精度就很高-the CPLD or FPGA to achieve a very practical frequency circuit, as long as the input frequency, on the high precision
Date : 2025-12-19 Size : 74kb User : 王石子
[MiddleWare] pwm_VerilogHDLV1.1 DL : 0: 本软件在CPLD上实现数字PWM控制，用Verilog HDL语言编写，在MAX　ＰＬＵＳ　ＩＩ调试成功，可用-the software on the CPLD digital PWM control, using Verilog HDL language, MAX PLUS II in debugging success can be
Date : 2025-12-19 Size : 227kb User : wjz
[MiddleWare] counter DL : 0: 基于CPLD的计数器实现光纤测距，包含与单片机的时序控制 Verilog 实现通过仿真-CPLD-based counters realize optical ranging, single-chip microcomputer that contains timing control and realize the adoption of Verilog simulation
Date : 2025-12-19 Size : 2kb User : 强冰
[MiddleWare] cpld_key DL : 0: FPGA 实现独立式按键，每按一下数码管+1，数码管是静态显示
Date : 2025-12-19 Size : 180kb User : 徐后乐