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[OS Develop] matrix_OK DL : 0: 操作系统实验——体验多线程。通过在win32环境下的编程，熟悉操作系统中的多线程技术-operating system---try to use multiply threads
Date : 2025-12-28 Size : 1kb User : jimmy lin
[OS Develop] EDA DL : 0: 采用一种基于FPGA的IIR数字滤波器的设计方案,通过QuartusⅡ的设计平台，采用自顶向下的模块化设计思想将整个IIR数字滤波器分为：时序控制、延时、补码乘加和累加四个功能模块。分别对各模块采用VHDL进行描述后，进行了仿真和综合。-IIR digital filter using a FPGA-based design, analyzes the theory and design method of IIR digital filter, then through QuartusⅡ design platform, using a top-down modular design the entire IIR digital filter divided into: timing control, delay, complement multiply and accumulate four functional modules. Respectively, after each module using VHDL description, simulation and synthesis.
Date : 2025-12-28 Size : 3.46mb User : wangqian