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[MPI] sdgshjd DL : 0: 数字系统设计这是有关的相关源代码，有简易CPU 除法器、计数器等 ...[fpdiv_vhdl.rar] - 四位除法器的vhdl源程序 [vhdl范例.rar] - 最高优先级编码器8位相等比较器三人表决器（三种不同的描述方式）加法器描述 8位总线收发器：74245 （注2）地址译码（for m68008）多路选择器（使 BR> ... -Digital System Design This is the underlying source code, a simple CPU divider. Counter etc. ... [fpdiv_vhdl.rar]- 4 division of vhdl source [vh dl example. rar]- highest priority encoder compared to eight for phase three of the vote (the three different description ) Adder Description eight bus transceiver : 74245 (Note 2) address decoder (for m68008) Multiple choice (so that BR
Date : 2025-12-29 Size : 1kb User : 张瑞
[MPI] 222222 DL : 0: 北京公交线路选择问题功能完全实现的工交算法，但是速度不快-Beijing bus lines feature selection algorithm for the full realization of the communications, but slow
Date : 2025-12-29 Size : 1kb User : 杨光
[MPI] pci_core_verilog DL : 0: PCI-master的核，verilog语言，经测试，可完成芯片的综合及布线-PCI-master s nuclear, verilog language, by testing, to be completed by the integrated chip and wiring
Date : 2025-12-29 Size : 211kb User : 伊路发
[MPI] i2c.tar DL : 0: i2c总线控制器ipcore，包含testbench-i2c bus controller ipcore, contains Testbench
Date : 2025-12-29 Size : 628kb User : 吴飞
[MPI] I2C DL : 0: I2C总线的verilog 程序，非常有用，已经经过验证。-Verilog I2C bus procedures, very useful, has been verified.
Date : 2025-12-29 Size : 69kb User : LLT
[MPI] sdcard_mass_storage_controller.tar DL : 0: latest sdcard_mass_storage_controller core from opencores.org wishbone bus
Date : 2025-12-29 Size : 2.18mb User : asdtgg
[MPI] formbackold DL : 0: 使用IEEE33 BUS系統所求出來的匯流排電壓、相角、功率，是用前代回法求解電力潮流，希望對大家有幫助。-Seeking out the use the IEEE33 BUS system bus voltage, phase angle, power, with the previous generation back method for solving power flow, and I hope for all of us to help.
Date : 2025-12-29 Size : 1kb User : 徐明
[MPI] Xilinx_PCIe_BMD DL : 0: xilinx FPGA 开发 PCIe BMD DMA的verilog HDL源码-xilinx fpga pcie Gen 1/2 bus master device---PCIe DMA with verilog HDL
Date : 2025-12-29 Size : 58kb User : 赵极远