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[Mathimatics-Numerical algorithms] MAC DL : 0: Multiplier/Accumulator written in Verilog
Date : 2025-12-14 Size : 375kb User : binh
[Mathimatics-Numerical algorithms] DDS-16bit DL : 0: Simulation of direct digital synthesis sine wave in the MathCAD (10 bit ADC, 16-bit accumulator, 12-bit ROM, the clock frequency of 25MHz)
Date : 2025-12-14 Size : 13kb User : user