Search - vhdl usb

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[Other Embeded program] altera_USB_blaste DL : 0: altera USB blaste 制作全套资料。包括原理图、93LC46的配置文件和CPLD的VHDL源程序。-altera USB blaste produced full set of information. Including drawings, 93LC46 configuration files and CPLD VHDL source.
Date : 2025-12-26 Size : 134kb User : xuphone
[Other Embeded program] ip DL : 0: usart的verilog代码.rar 包括很多的FPGA ip 源码，可以直接应用 uart_vhdl.zip sl811usb包含源程序.rar mc8051_design.zip mcpu_1[1].05.zip minicpu.zip mmc_lark_original.zip -USART the Verilog code. rar, including many of the FPGA ip source, can be applied directly uart_vhdl.zipsl811usb contains the source code. rarmc8051_design.zipmcpu_1 [1] .05. zipminicpu.zipmmc_lark_original.zip
Date : 2025-12-26 Size : 5.14mb User : 钟阳
[Other Embeded program] cp2102(chinese) DL : 0: 单芯片 USB 转 UART 数据转换器 - 集成的 USB 收发器无需外部电阻 - 集成的时钟无需外部振荡器 - 集成的 512 字节 EEPROM 用于为供应商代码产品代码序列号功率标牌版本号和产品描述等数据提供存储空间 - 片内上电复位电路 - 片内电压调节器3.3V 输出 USB 功能控制器 -符合USB 规范 2.0 全速 (12 Mbps) -通过SUSPEND 和 RI 引脚支持的USB中止状态-Single-Chip USB to UART Data Transfer 􀁺 Integrated USB transceiver no external resistors required 􀁺 Integrated clock no external crystal required 􀁺 Integrated 1024-Byte EEPROM for vendor ID, product ID, serial number, power descriptor, release number, and product description strings 􀁺 On-chip power-on reset circuit 􀁺 On-chip voltage regulator: 3.3 V output 􀁺 100 pin and software compatible with CP2101 USB Function Controller 􀁺 USB Specification 2.0 compliant full-speed (12 Mbps) 􀁺 USB suspend states supported via SUSPEND pins
Date : 2025-12-26 Size : 169kb User : lin