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[
VHDL-FPGA-Verilog
]
cordic
DL : 0
用于实现sin,cos三角函数计数的VHDL程序代码-towards sin, cos trigonometry count VHDL code
Date
: 2026-01-02
Size
: 2kb
User
:
王森
[
VHDL-FPGA-Verilog
]
cordic
DL : 0
we propose a low-cost sequential and high performance architecture for the implementation of CORDIC algorithm in two computation modes. It suited for serial operation that performs conversion between polar and rectangular coordinate systems, essentially sin/cos, sinh/cosh and arctan computation. In our proposed architecture, radix-2 arithmetic is employed. The design targets real time application of fingerprint recognition. We present our VHDL description of CORDIC algorithm. To reduce iteration delay, we used some combinatory blocks. Fixed point arithmetic was considered. To valid our conception and its CORDIC accuracy, we present relative error calculated in convergence range for some trigonometric and hyperbolic functions. Our architecture was implemented and tested. The contribution of the paper includes the CORDIC design flow. -we propose a low-cost sequential and high performance architecture for the implementation of CORDIC algorithm in two computation modes. It suited for serial operation that performs conversion between polar and rectangular coordinate systems, essentially sin/cos, sinh/cosh and arctan computation. In our proposed architecture, radix-2 arithmetic is employed. The design targets real time application of fingerprint recognition. We present our VHDL description of CORDIC algorithm. To reduce iteration delay, we used some combinatory blocks. Fixed point arithmetic was considered. To valid our conception and its CORDIC accuracy, we present relative error calculated in convergence range for some trigonometric and hyperbolic functions. Our architecture was implemented and tested. The contribution of the paper includes the CORDIC design flow.
Date
: 2026-01-02
Size
: 2kb
User
:
Nihel Neji
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