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[VHDL-FPGA-Verilog] BPSK DL : 0: 用于BPSK调制的自行设计，说明如下： 1.matlab.txt中的程序是matlab平台下的.mat格式。目的是输出一个64*4的矩阵，矩阵的每个元素都为0~255间的整数。矩阵每行的四个数是一个码元的四个抽样点的量化值。但由于当前码元通过升余弦滤波系统时，受到前后共6个码元的共同影响，所以是由6个码元共同决定。这6个码元是随机的，可能是0也可能是1（双极性时可能是-1也可能是+1），故6个码元共2^6=64种情况，所以产生的矩阵是64*4。最后逐行输出这256个数。 2.BPSK3中程序的目的是：将m序列通过滚降系数为0.3的升余弦滤波系统后的信号采样输出。 3.BPSK5中程序的目的是：将m序列通过滚降系数为0.5的升余弦滤波系统后的信号采样输出。 4.以上两个程序的运行平台为Quartus（verilog语言）。-BPSK modulation is used to design, as follows: 1.matlab.txt the program is under matlab platform. Mat format. Purpose is to output a 64* 4 matrix, each element is an integer between 0 and 255. Matrix of each line is a symbol of four the number of sampling points of the four quantitative value. However, due to the current symbol by raised cosine filtering system, before and after a total of six yards by the combined effect of element, it is shared by the six yards per decision. The 6 symbol is random, may be 0 may be 1 (may be bipolar may be+1-1), so a total of six yards per 2 ^ 6 = 64 kinds of situations, so the resulting matrix 64* 4. Finally, the number of progressive output of the 256. 2.BPSK3 purposes of the procedure is: m sequence of roll-off factor of 0.3 by the raised cosine filter system output after the signal sampling. 3.BPSK5 purposes of the procedure is: m sequence of roll-off factor of 0.5 by the raised cosine filter system output after the signal sampling.
Date : 2025-12-25 Size : 4kb User :