Search - reader

Search - reader - List

[VHDL-FPGA-Verilog] xiaolizi1588 DL : 0: ic读卡器能读ic电话卡并按时记费-ic reader can read ic phone cards and charged fees on time. .
Date : 2026-01-16 Size : 399kb User : 胡加文
[VHDL-FPGA-Verilog] xc9572_1 DL : 0: xilinx xc9572 cpld 实现的伺服电机控制器，电机控制输出，和增量编码器读取。-Xilinx xc9572 cpld achieve servo motor controller, motor control output, Incremental encoder and the reader.
Date : 2026-01-16 Size : 779kb User : 张宏亚
[VHDL-FPGA-Verilog] verilog DL : 0: verilog设计练习进阶,针对的读者是 verilog hdl的初学者。-Advanced Verilog design practice, in view of the reader is beginner verilog hdl.
Date : 2026-01-16 Size : 101kb User : xuping
[VHDL-FPGA-Verilog] SDcardcode DL : 0: 基于c语言上的SD卡读写源程序，希望对大家有所帮助~-Based on c language source SD card reader, I hope all of you to help ~
Date : 2026-01-16 Size : 20kb User : 王一木
[VHDL-FPGA-Verilog] The_Verilog_Hardware_Description_Language DL : 0: 初学者学习verilog语言的启蒙读本，阅读容易-Beginners to learn Verilog language Enlightenment Reader, easy to read
Date : 2026-01-16 Size : 229kb User : 谷牧
[VHDL-FPGA-Verilog] SD_W_R DL : 0: SD卡读写源代码.用Verilog编写.很不错.值得借鉴.特别对SD卡开发的人员!-SD card reader-writer source code. Prepared to use Verilog. Is pretty good. Be used for reference. In particular, the development of personnel SD card!
Date : 2026-01-16 Size : 4kb User : ZZ
[VHDL-FPGA-Verilog] DE2_SD_Card_Audio DL : 0: SD卡读取音频数据，由VGA显示。Verilog HDL语言编写，适用DE2实验箱-SD card reader audio data from the VGA display. Verilog HDL language, the application of the experimental box DE2
Date : 2026-01-16 Size : 3kb User : 白雪
[VHDL-FPGA-Verilog] dianzizhong DL : 0: 用vhdl编写的简易电子中设计，经过测试成功，且用记事本上载，无需阅读器进行阅读。-Use of VHDL in the preparation of simple electronic design, has been tested successfully, and use Notepad to upload without reader reading.
Date : 2026-01-16 Size : 1kb User : stone
[VHDL-FPGA-Verilog] VHDL DL : 0: 电子抢答器VHDL语言设计材料是一图文格式的可能需要读者自己打上去不过绝对真实-Answer electronic device materials VHDL language design is a graphic format, the reader may need to play up its own absolutely true, however
Date : 2026-01-16 Size : 1.73mb User : 陈明
[VHDL-FPGA-Verilog] sd_reader DL : 0: SD卡读卡器模块的VHDL及软件驱动代码，可作为外设挂接在Avalon总线上。支持以SD模式、4线模式读取。在24MHz时钟驱动下读取速率可达8MByte/s-SD card reader module and software drivers VHDL code, can be articulated as a peripheral bus in Avalon. To support the SD model, 4-wire mode read. Driven by the 24MHz clock rate up to read 8MByte/s
Date : 2026-01-16 Size : 18kb User : ctqy
[VHDL-FPGA-Verilog] SD_card_src DL : 0: 一个基于VHDL语言的8位SD卡读取程序。含有源代码和说明-VHDL language based on an 8-bit SD card reader. Containing the source code and description
Date : 2026-01-16 Size : 20kb User : 李超
[VHDL-FPGA-Verilog] VHDL DL : 0: 8位相等比较器含源代码，用VHDL语言编写，具体很高的实用性，供读者参考-8, phase comparator, such as with the source code, using VHDL language, the specific relevance of a high for the reader is referred to
Date : 2026-01-16 Size : 1kb User : lijinling
[VHDL-FPGA-Verilog] Presentation_Final DL : 0: FPGA Based RFID Reader for 125KHz and 134.2Khz Final Presentation
Date : 2026-01-16 Size : 683kb User : Farhan
[VHDL-FPGA-Verilog] FPGA DL : 0: 文中详细介绍了关于FPGA的相关内容和入门要领，便于读者学习和进行综合提高-Text in detail on the FPGA and the associated key entry for the reader a comprehensive study and improve the
Date : 2026-01-16 Size : 10.45mb User : rabbit
[VHDL-FPGA-Verilog] state DL : 0: 米勒解码器的状态转换模块。用verilog语言编写，ISE为开发环境-Miller decoder module of the state transition
Date : 2026-01-16 Size : 268kb User : kinki
[VHDL-FPGA-Verilog] begoogatsme DL : 0: 讲述如何写好状态机的文档给出了新颖的思路以及帮助读者上手的例子-On how to write state machine is given the document, as well as innovative ideas to help the reader-to-use examples
Date : 2026-01-16 Size : 288kb User : 孔楠
[VHDL-FPGA-Verilog] VHDLGuideAndCode DL : 0: 该教程比较详细的介绍了VHDL语言，对其语法的使用，编程中的技巧由浅到深的进行介绍，并且给出了90个VHDL源代码，其中包括测试程序、各功能测试代码等。由于文档为pdg格式，在PDG Reader文件夹中给出该阅读器。-The tutorial more detailed introduction to the VHDL language, its syntax, the use of programming techniques from shallow to deep, are introduced, and gives 90 VHDL source code, including test procedures, the functional test code. As the document is a pdg format, PDG Reader folder, given to the reader.
Date : 2026-01-16 Size : 16.93mb User : 李熠
[VHDL-FPGA-Verilog] Exp25_USB_Reader DL : 0: 基于FPGA与Nios II设计的USB电子文本阅读器-Nios II FPGA-based design with USB electronic text reader
Date : 2026-01-16 Size : 9.89mb User : 晏翊
[VHDL-FPGA-Verilog] Device-DNA-Reader DL : 0: 基于Xilinx FPGAD SPartan-3an开发板的 DNA Reader参考设计-DNA Reader Base on Xilinx FPGAD SPartan-3an kit
Date : 2026-01-16 Size : 3.22mb User : saladin
[VHDL-FPGA-Verilog] Design-of-FPGA-based-reader DL : 0: Design of FPGA-based reader
Date : 2026-01-16 Size : 118kb User : 李林

« 12 3 4 5 »