Search - matlab image

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[VHDL-FPGA-Verilog] imageEnhancement_VHDL DL : 0: VHDL 实现的图像增强，利用对比度增强的方法，实用-VHDL of image enhancement, use of contrast enhancement methods, practical
Date : Size : 113kb User : 严刚
[VHDL-FPGA-Verilog] color_converter.tar DL : 0: 此代码实现不同图像颜色制式之间的相互转换，如XYZ<->RGB, 不同标准的RGB<->RGB 以及RGB<->YCbCr之间的转换，包内含有matlab仿真代码m文件、VHDL代码.v文件以及modelsim仿真的testbench文件，相信对大家有一定的帮助-This code different image color conversion between formats, such as XYZ <-> RGB, different standards of RGB <-> RGB and RGB <-> YCbCr conversion between packet contains code m file matlab simulation, VHDL code . v documents and ModelSim Simulation Testbench documentation, I believe everyone will certainly help
Date : Size : 332kb User : 王弋妹
[VHDL-FPGA-Verilog] histogram4 DL : 0: 利用matlab和modelsim完成了用直方图均衡化处理灰色图片的前仿真，有处理前后图片的对比，verilog语言编写，但到用实时处理还差很远-Completed using matlab and modelsim deal with the gray image histogram equalization before the simulation, a comparison of before and after pictures, verilog language, but with real-time processing is very much far
Date : Size : 19.01mb User : 杨兔艳
[VHDL-FPGA-Verilog] 4 DL : 0: 图像提取，用matlab做仿真，目标清晰，效果很好-Image extraction
Date : Size : 32kb User : 成语
[VHDL-FPGA-Verilog] lunaRotation DL : 0: 这里是对图像旋转的讲解和相关的matlab程序。还有相应的PPT供大家学习。-Here is the explanation of the image rotation and related matlab program. PPT also appropriate for them to learn.
Date : Size : 13kb User : 李佳悦
[VHDL-FPGA-Verilog] histogram-equalization-verilog DL : 0: 直方图均衡的Verilog实现从Matlab读出图像为image.txt文件，经过Modelsim读入TXT文件进行直方图均衡处理，将输出结果再读出为image_he.txt文件，然后在Matlab观察直方图均衡增强效果。-The histogram equalization Verilog read from Matlab the image image.txt file after the Modelsim read into the TXT file, histogram equalization processing, and output the results read out for image_he.txt file, then the histogram equalization enhancement observed in Matlab.
Date : Size : 2kb User : 杨光
[VHDL-FPGA-Verilog] TEXTIO_Import_txt_Matlab DL : 0: 将FPGA设计仿真结果数据写入到txt记事本中，然后通过Matlab读取txt中的数据并显示图像-write the FPGA simulation result data into textbook,and read these data from textbook and display image in Matlab
Date : Size : 1kb User : 王文华
[VHDL-FPGA-Verilog] VLSI-Project-Median-filer DL : 0: FPGA和ASIC实现的图像中值滤波模块，各模块的仿真结果以及MATLAB,Modelsim联合仿真。这是中科大超大规模集成电路设计优化的final project。附有最终版的report和presention。-FPGA and ASIC implementation of image filtering modules, each module of the simulation results and MATLAB, Modelsim co-simulation. This is the USTC VLSI design optimization final project. With the final version of the report and the presention.
Date : Size : 14.11mb User : 刘星宇
[VHDL-FPGA-Verilog] FPGA-based-image-median-filtering DL : 0: 基于FPGA的图像中值滤波，在xilinx的FPGA上实现了算法，采用matlab的算法最终通过了验证。-FPGA-based image median filtering on xilinx FPGA implementation of the algorithm, using matlab algorithm finally passed validation.
Date : Size : 26.42mb User : lushusho
[VHDL-FPGA-Verilog] eup DL : 0: It is the HDL and MATLAB code for image processing in Modelsim.
Date : Size : 29kb User : M
[VHDL-FPGA-Verilog] image-rotation DL : 0: 基于FPGA的system generator的图像旋转处理，利用system generator的图像旋转处理程序。本程序是基于system generator下的matlab运行。-FPGA-based image processing system generator rotation, the use of image rotation system generator handler. This procedure is based on matlab run under the system generator.
Date : Size : 155kb User : wyj
[VHDL-FPGA-Verilog] 8-TFT_24 DL : 0: 基于Xilinx Spartan6自制开发板实验，2.4存TFT屏静态刷新特定图片。如果要修改图片，请使用Matlab将图片生成*.coe格式，生成ROM加载。-Development board based on Xilinx Spartan6 homemade experiment, 2.4 TFT screen kept static refresh specific picture. If you want to modify the picture, the image is generated using Matlab* .coe format, generate ROM loaded.
Date : Size : 1.28mb User : 康二栋1号
[VHDL-FPGA-Verilog] filter DL : 0: image filtering on gasian filtering in any RGB image with matlab
Date : Size : 3.45mb User : vasanth
[VHDL-FPGA-Verilog] tnn7_code_201212141110 DL : 0: 人脸检测与跟踪是一个重要而活跃的研究领域，它在视频监控、生物特征识别、视频编码等领域有着广泛的应用前景。该项目的目标是在FPGA板上实现实时系统来检测和跟踪人脸。人脸检测算法包括肤色分割和图像滤波。通过计算被检测区域的质心来确定人脸的位置。该算法的软件版本独立实现，并在matlab的静止图像上进行测试。虽然从MATLAB到Verilog的转换没有预期的那样顺利，实验结果证明了实时系统的准确性和有效性，甚至在不同的光线、面部姿态和肤色的条件下也是如此。所有硬件实现的计算都是以最小的计算量实时完成的，因此适合于功率受限的应用。(Face detection and tracking is an important and active research field, and it has a wide range of applications in video surveillance, biometrics, video coding and other fields. The goal of the project is to implement real-time systems on the FPGA board to detect and track faces. Face detection algorithms include skin segmentation and image filtering. The location of the human face is determined by calculating the centroid of the detected region. The software version of the algorithm is implemented independently and tested on MATLAB still images. Although the conversion from MATLAB to Verilog is not as smooth as expected, the experimental results demonstrate the accuracy and effectiveness of real-time systems, even in different light, facial gestures and color conditions. All hardware implementations are performed in real-time with minimal computational complexity and are therefore suitable for power constrained applications.)
Date : Size : 62kb User : 合发
[VHDL-FPGA-Verilog] isjtc DL : 0: Use serial programming examples matlab GUI implementation, Independent component analysis for image processing, Realize image watermarking, de-noising, plus noise and other functions.
Date : Size : 4kb User : fyqdwg
[VHDL-FPGA-Verilog] kr637 DL : 0: Import data files as input parameters matlab program is running, Power System Transient Stability Program, can be transient stability, The true extent of the value of the intermediary measure, measure the true extent of the agency based on the value of image segmentatio.
Date : Size : 6kb User : tougaofao
[VHDL-FPGA-Verilog] qd317 DL : 0: Weighted acceleration, In the MATLAB image texture feature, Achieve serial data acquisition.
Date : Size : 10kb User : meigengping
[VHDL-FPGA-Verilog] vdhbu DL : 0: Import data files as input parameters matlab program is running, Various kalman filter design, Realize image watermarking, de-noising, plus noise and other functions.
Date : Size : 8kb User : diqprmbg
[VHDL-FPGA-Verilog] kengtentui DL : 0: matlab implements five gray correlation degree computing model, Decoupling, restore the original signal, Including compression ratio, image restoration computing uptime and peak signal to noise ratio.
Date : Size : 7kb User : hingnaihao
[VHDL-FPGA-Verilog] tang_ip61 DL : 0: The received signal is given eye and BER simulation systems, In the MATLAB image texture feature, Contains a common array signal processing algorithm.
Date : Size : 8kb User : nengqeisui

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