Search - linux makefile

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[VHDL-FPGA-Verilog] synplify_makefile DL : 0: synplify、ise和verdi在linux上的makefile；多个工具集成在一个文件管理，方便快捷，值得参考-the makefile for synplify, ise and verdi on Linux multiple tools integrated into a document management, convenient and valuable reference! ! !
Date : 2025-12-19 Size : 1kb User : Jasking Wu
[VHDL-FPGA-Verilog] vhdl.tar DL : 0: 38译码器的VHDL实现，支持linux平台，包含完整的Makefile支持。-38 decoder VHDL, support linux platform, including full Makefile support.
Date : 2025-12-19 Size : 1kb User : noname
[VHDL-FPGA-Verilog] verilog add4 DL : 0: 分两部分，基于verilog的四位和八位加法器设计，用synopsys的VCS仿真工具进行功能仿真，掌握基本的makefile编写以及linux操作。(Divided into two parts, four and eight adder based on verilog design, function simulation with synopsys VCS simulation tools, master the basic makefile writing and Linux.)
Date : 2025-12-19 Size : 500kb User : yzzls
[VHDL-FPGA-Verilog] fifo DL : 0: 基于verilog HDL的fifo设计与测试，包含设计与测试代码，以及简单的makefile编写。整个平台是基于linux操作，仿真平台是基于SYNOPSYS的vcs工具。(Based on verilog HDL fifo design and testing, including the design and test code, and simple makefile.The platform is based on Linux operating, the simulation platform is based on the VCS of SYNOPSYS tools.)
Date : 2025-12-19 Size : 15kb User : yzzls