Search - band pass filter vhdl

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[VHDL-FPGA-Verilog] FIR低通滤波器部分模块 DL : 0: 一个FIR低通滤波器,最小阻带衰减-30db,带内波动小于1db．用MAXPLUS2设计与仿真。-This is a FIR LPF, with-30dB in stop-band and sigma is less than 1dB. It is designed and simulated on MAXPLUS2.
Date : 2025-12-26 Size : 5kb User : 吴健宇
[VHDL-FPGA-Verilog] 48_fir DL : 0: 本次设计的数字基带成形滤波器参照IS-95标准进行设计，对输入信号进行4倍过采。IS-95标准为：其中通带频率为590Khz，通带的链波大小1.5dB，截止带的频率为740Khz，截止带的衰减量为40dB，传输的数据率为1.2288Mhz，传输的频宽为1.25Mhz。-The design of the digital base-band shaping filter with reference to IS-95 standard design, the input signal to 4 times over mining. IS-95 standards as follows: one pass-band frequency is 590Khz, passband wave the size of the chain of 1.5dB, closing with the frequency of 740Khz, closing with attenuation of 40dB, the data transmission rate of 1.2288Mhz, transmission bandwidth for 1.25Mhz.
Date : 2025-12-26 Size : 89kb User : 刘强
[VHDL-FPGA-Verilog] vhdl DL : 0: FIR滤波器的性能参数设计一个滤波器最基本的就是性能参数的,决定着滤波器的实际功能.比如阶数,截至频率。本文滤波器设计参数 ①输入,输出数据宽度10位 ②阶数为4阶的线性相位FIR滤波器， ③类型:带通 -FIR filter performance parameters The design of a filter is the most basic performance parameters, determines the actual filter function. For example, the order, as the frequency. In this paper, filter design parameters ① input and output data width of 10 ② order for the 4 order of the linear phase FIR filter, ③ Type: Band Pass
Date : 2025-12-26 Size : 3kb User : bobo
[VHDL-FPGA-Verilog] fir_9222_sopc DL : 0: 基于sopc技术的数字均衡器带通滤波器及12864液晶显示-Sopc technology-based digital equalizer band-pass filter and liquid crystal display 12864
Date : 2025-12-26 Size : 5.64mb User : z