CodeBus
www.codebus.net
Search
Sign in
Sign up
Hot Search :
Source
embeded
web
remote control
p2p
game
More...
Location :
Home
Search - arrow
Main Category
SourceCode
Documents
Books
WEB Code
Develop Tools
Other resource
Search - arrow - List
[
VHDL-FPGA-Verilog
]
mouse_control
DL : 0
1、 用FPGA实现PS/2鼠标接口。 2、 鼠标左键按下时十字形鼠标图象的中间方块改变颜色,右按下时箭头改变颜色。 3、 Reset按键:总复位。 -one with FPGA PS/2 mouse interface. 2, the left mouse button pressed cruciform images in the middle mouse to change the color box, press the right arrow at the change in color. 3, Reset buttons : the total reduction.
Date
: 2025-12-30
Size
: 9kb
User
:
lee
[
VHDL-FPGA-Verilog
]
Traffic_llight_controller
DL : 0
Consider the following variation on the traffic light controller problem. A North-South road intersects an East-West road. In addition to the Red/Yellow/Green traffic lights, the N-S road has green left-turn arrows. The arrows work as follows. With the traffic lights red in all direction, the N-S left turn arrows are illuminated Green. Then they turn yellow and finally they turn red. At this point, the N-S lights cycle Green/Yellow/Red. In the N-S direction, the Green Arrow time is 16 seconds and the Yellow Arrow time is 8 s. Overlapping with this is Red light time, which is 88 s. The Green light time is 24 s and the Yellow light time is 8 s. The Red Arrow time is what is left after the other arrows have been illuminated within the N-S cycle. The E-W lights are: Red 56 s, Green 56 s, and Yellow 8 s. -Consider the following variation on the traffic light controller problem. A North-South road intersects an East-West road. In addition to the Red/Yellow/Green traffic lights, the N-S road has green left-turn arrows. The arrows work as follows. With the traffic lights red in all direction, the N-S left turn arrows are illuminated Green. Then they turn yellow and finally they turn red. At this point, the N-S lights cycle Green/Yellow/Red. In the N-S direction, the Green Arrow time is 16 seconds and the Yellow Arrow time is 8 s. Overlapping with this is Red light time, which is 88 s. The Green light time is 24 s and the Yellow light time is 8 s. The Red Arrow time is what is left after the other arrows have been illuminated within the N-S cycle. The E-W lights are: Red 56 s, Green 56 s, and Yellow 8 s.
Date
: 2025-12-30
Size
: 6kb
User
:
deepa
[
VHDL-FPGA-Verilog
]
VHDL_arrow
DL : 0
在8*8的双色点阵模块上显示电子路标,即一个箭头,并要求箭头可以沿一定方向流动。-The program will show a floating digital arrow along a direction in the square area with 8*8 double-color LEDs .
Date
: 2025-12-30
Size
: 53kb
User
:
雨一直下
[
VHDL-FPGA-Verilog
]
alarm
DL : 0
The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
Date
: 2025-12-30
Size
: 99kb
User
:
jayjay
[
VHDL-FPGA-Verilog
]
comp
DL : 0
The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
Date
: 2025-12-30
Size
: 112kb
User
:
jayjay
[
VHDL-FPGA-Verilog
]
curtain
DL : 0
The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
Date
: 2025-12-30
Size
: 112kb
User
:
jayjay
[
VHDL-FPGA-Verilog
]
lighting
DL : 0
The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
Date
: 2025-12-30
Size
: 89kb
User
:
jayjay
[
VHDL-FPGA-Verilog
]
modulated_gen
DL : 0
The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
Date
: 2025-12-30
Size
: 183kb
User
:
jayjay
[
VHDL-FPGA-Verilog
]
myfpga
DL : 0
详细描述设计过程 ① 指令格式设计 ② 微操作的定义 ③ 节拍的划分 ④ 处理器详细结构设计框图及功能描述(评分重点) a. 模块之间的连线单线用细线,2根及以上用粗线并标出根数及. b. 用箭头标明数据流向,例化时用到的信号名称应标在连线上 ⑤ 各功能模块结构设计框图及功能描述(评分重点) ⑥ VHDL代码、UCF文件、测试指令序列(每条指令的含义) ⑦ 实验总结,在调试和下载过程中遇到的问题 -Design Process Design ② ① instruction format defined micro-operation ③ ④ processor division beat a detailed description of the structural design and function block diagram (score focus) a detailed description single wire connection between modules with thin lines, 2 and above with crude line and mark the number and. b. Use the arrow indicating the flow of data, signal names used in cases of functional modules shall be marked ⑤ structural design diagram and functional description (score focus) ⑥ VHDL code on connection, UCF file test instruction sequence (the meaning of each instruction) ⑦ experiments summarized in debugging and downloading problems encountered in the process
Date
: 2025-12-30
Size
: 5.97mb
User
:
王思雨
[
VHDL-FPGA-Verilog
]
lab6
DL : 0
详细描述设计过程和实验中遇到的问题,包括: ① 指令格式设计 ② 微操作的定义 ③ 节拍的划分 ④ 处理器详细结构设计框图及功能描述(评分重点) a. 模块之间的连线单线用细线,2根及以上用粗线并标出根数及. b. 用箭头标明数据流向,例化时用到的信号名称应标在连线上 ⑤ 各功能模块结构设计框图及功能描述(评分重点) ⑥ VHDL代码、UCF文件、测试指令序列(每条指令的含义) 实验总结,在调试和下载过程中遇到的问题 -A detailed description of the design process and problems encountered in the experiment, including:. ① ② micro-operation instruction format design definition ③ ④ processor division beat detailed description of the structural design and function block diagram (score focus) a single-wire connection between modules with a thin, two more than the number indicated by bold lines and and. b. Use the arrow indicating the flow of data, signal names used when instantiated ⑤ shall be marked on the connection of each functional module design and function block diagram and description (Ratings Key) ⑥ VHDL code, UCF file, test instruction sequence (the meaning of each instruction) experiments summarized problems encountered during commissioning and download the
Date
: 2025-12-30
Size
: 5.58mb
User
:
王思雨
[
VHDL-FPGA-Verilog
]
vga_snake
DL : 0
这是一个基于VGA显示和PS2键盘的贪吃蛇游戏进入时屏幕提示“enter to play”,W,S,A,D四个CS游戏方向键,可按下P(PAUSE)暂停,进入选择关级,然后按下G(GO_ON)继续。游戏设置9关,每关吃下21个苹果即可过关。蛇的移动速度随着关级增加。每次按下按键都会有蜂鸣器提示声(暂时没有设置声音开关按钮,有兴趣的同学可以自己设计一下)。-This is a VGA-based display and PS2 keyboard greedy snake game when the screen prompts enter to play , W, S, A, D four CS game arrow keys, you can press P (PAUSE) to pause, enter the selection off Level, then press G (GO_ON) to continue. Game set 9 off, each time to eat 21 apples can go through. The speed of movement of the snake increases with the level. Each time you press the button will have a buzzer sound (not set the sound switch button, interested students can design their own).
Date
: 2025-12-30
Size
: 14.41mb
User
:
谢炀
CodeBus
is one of the largest source code repositories on the Internet!
Contact us :
1999-2046
CodeBus
All Rights Reserved.