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[VHDL-FPGA-Verilog] pi_ctrl DL : 0: VHDL实现PI调节的算法。内部使用整数计算，避开了浮点数的运算。仿真结果正确-VHDL realize PI regulator algorithm. Internal use integer calculations to avoid the floating point arithmetic. The simulation results correctly
Date : 2026-01-02 Size : 1kb User : 刘新
[VHDL-FPGA-Verilog] Mentekaluo DL : 0: 本程序和文件主要利用蒙特拉罗的思想来完成圆周率的计算，利用事物发生的概率来逼近真实情况。-The programs and files using mainly Mengtelaluo thought to complete the calculation of pi, using the probability of things have to approximate the actual situation.
Date : 2026-01-02 Size : 56kb User : zonglichen
[VHDL-FPGA-Verilog] controller DL : 0: PI controller and its source code
Date : 2026-01-02 Size : 2kb User : sanjivkumar
[VHDL-FPGA-Verilog] fir_sine DL : 0: This implementation is moderately memory efficient because it stores only the first Pi/2 radians of sine values. The second Pi/2 radians is a mirror image of the first in time and the second Pi radians is a mirror image in amplitude of the first Pi radians. Memory could be saved if the increments were recorded rather than each absolute value. Fewer bits per value would be needed, however, extra hardware would be needed for an adder.
Date : 2026-01-02 Size : 18kb User : jai
[VHDL-FPGA-Verilog] PIDctrol DL : 0: VHDL实现PI控制,包括三个文件,FPU,PID-VHDL pi control，pid
Date : 2026-01-02 Size : 2kb User : 杨军
[VHDL-FPGA-Verilog] lock-and-lcd DL : 0: 基于博创实验箱UP-CUP-FPGA2C35-Ⅱ和Verilog HDL硬件描述语言，分为按键输入模块、LED指示灯模块及LCD显示模块，采用按键BTN1、BTN2作为输入端输入四位密码与事先设定的密码进行匹配，由D1、D2、D3、D4四盏LED灯来指示输入密码的位数。开机时，LCD显示“HELLO! WELCOME!Enter the code:当”，密码输入正确时，LED灯D7亮，同时在实验箱LCD显示屏上显示字符串“Good! Well done!you are right!!!”，当密码输入错误时，LED灯D8亮，并在LCD显示屏上显示字符串“NO!!You stupid!!you are worry!!!”其中，LCD显示作为本次设计的核心内容，字符型LCD通常有14条引脚线或16条引脚线的LCD，多出来的2条线是背光电源线VCC(15脚)和地线GND(16脚)，其控制原理与14脚的LCD完全一样-Base YuBo gen experiment box UP- FPGA2C35- Ⅱ and director- Verilog HDL hardware description language, divided into key input module, the LED indicator light module and LCD display module, the BTN1, BTN2 buttons as input the input password and set in four matches, the password by D1, D2 and D3, D4 four lamp that LED lamp to indicate input password of digits. Boot, LCD display "HELLO!!!!!!!!!! The code: backgound Enter when", a password when right, LED lamp, while D7 light displayed on the LCD screen experiment box string "Good!! Well done! You right!!!" hero When a password mistake, LED lamp light, and in D8 displayed on the LCD screen "NO!! You string can be hindered stupid!!!!!!!!!!!!!!!!!" hero Among them, LCD display as the core content of the design, character type LCD usually has 14 pin line or 16 pins line of LCD, extra 2 line is backlit cord VCC (15 feet) and landlines GND (16 feet), the control principle and 14 feet LCD exactly the same
Date : 2026-01-02 Size : 3kb User : 吴寿武
[VHDL-FPGA-Verilog] LV-MaxSonar-EZ3-Datasheet DL : 0: pi controller using fpga
Date : 2026-01-02 Size : 253kb User : Jakka
[VHDL-FPGA-Verilog] PI(use_vhdl) DL : 0: 工程上常用的增量式PI算法的控制程序，采用vhdl语言编写-Engineering incremental PI algorithm used to control the program using vhdl language
Date : 2026-01-02 Size : 1kb User : 刘大仔
[VHDL-FPGA-Verilog] closed_SPWM DL : 0: 带PI闭环测试生成的SPWM方案已通过测试，可以实现SPWM输出 -SPWM scheme with a PI closed-loop test generation has been tested, you can achieve SPWM output
Date : 2026-01-02 Size : 2kb User : john
[VHDL-FPGA-Verilog] dds DL : 0: 使用AD9959实现倒pi的正弦功能，中频是60M -using AD9959 to output a sine with it s phase change
Date : 2026-01-02 Size : 4.2mb User : chengjingjing
[VHDL-FPGA-Verilog] PI DL : 0: 数字式PI比例积分控制器，有关自动控制方面的知识-The digital PI PI controller, the automatic control of knowledge
Date : 2026-01-02 Size : 1kb User : 李强
[VHDL-FPGA-Verilog] PIcontrol DL : 0: 数字式PI比例积分控制器，有关自动控制方面的知识-The digital PI PI controller, the automatic control of knowledge
Date : 2026-01-02 Size : 2kb User : 李强
[VHDL-FPGA-Verilog] digitPI_control DL : 0: 数字式PI比例积分控制器，有关自动控制方面的知识-The digital PI PI controller, the automatic control of knowledge
Date : 2026-01-02 Size : 2kb User : 李强
[VHDL-FPGA-Verilog] SPI-Verilog-123 DL : 0: spi slave code s pi slave code spi slave code -spi slave code spi slave code spi slave code spi slave code
Date : 2026-01-02 Size : 16kb User : 何莉
[VHDL-FPGA-Verilog] filter_signed_and_unsigned DL : 0: FIR滤波器的verilog语言实现（输入为8bit有符号以及无符号两种，滤波器为8阶，截止频率约在6*pi/7）-FIR filter verilog language (input 8bit signed and unsigned are two 8-order filter cut-off frequency is about 6* pi/7)
Date : 2026-01-02 Size : 3kb User : 范慧敏
[VHDL-FPGA-Verilog] 2010_5 DL : 0: PI控制器的算法及源码，迅速掌握FPGA的VHDL算法实现！-Algorithm and source code of PI controller, quickly grasp the implementation of VHDL algorithm in FPGA!
Date : 2026-01-02 Size : 41kb User : Kalman_li
[VHDL-FPGA-Verilog] PI DL : 0: 实现PI控制算法，通过调节比例积分参数可实现对不同应用的PI闭环控制-Realize PI control algorithm parameters by adjusting the proportional-integral PI closed-loop control can be achieved for different applications
Date : 2026-01-02 Size : 377kb User : cpf
[VHDL-FPGA-Verilog] f8730f202fe8 DL : 0: 基于vhdl的pi算法，程序写的很详细，利用整数运算避免使用浮点数(PI algorithm based on VHDL)
Date : 2026-01-02 Size : 1kb User : 短腿的反击
[VHDL-FPGA-Verilog] 2581 DL : 0: Complex of three-point Gauss-lengend the Formula pi, Including orbital maneuvering simulation, initial orbit calculation, University of numerical analysis algorithms.
Date : 2026-01-02 Size : 5kb User : wmmkkgi
[VHDL-FPGA-Verilog] pingjie1 DL : 0: 基于fpga的pi/4dqpsk 调制，用Verilog语言编写(Pi/4dqpsk modulation based on FPGA, written in Verilog language)
Date : 2026-01-02 Size : 2.89mb User : maerzaizai

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