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[VHDL-FPGA-Verilog] Flashcontrollerxilinx DL : 0: Single power supply operation — Full voltage range: 2.7 to 3.6 volt read, erase, and program operations — Separate VCCQ for 5 volt I/O tolerance n Automated Program and Erase — Page program: 512 + 16 bytes — Block erase: 8 K + 256 bytes n Block architecture — 8 Kbyte blocks + 256 byte spare area (separately erasable, readable, and programmable) — 512 byte page + 16 byte spare area for ECC and other system overhead information n Fast read and program performance (typical values) — Read: < 7 μs initial, < 50 ns sequential — Program: 200 μs (full page program at 400 ns/byte) — Erase: < 2 ms/8 Kbyte block n Pinout and package — Industry Standard NAND compatible pinout with 8-bit I/O bus and control signals — TSOP-II 44/40 pin package (standard and reverse) with copper lead frame for higher reliability — 40-ball FBGA package provides higher reliability-Single power supply operation — Full voltage range: 2.7 to 3.6 volt read, erase, and program operations — Separate VCCQ for 5 volt I/O tolerance n Automated Program and Erase — Page program: 512+ 16 bytes — Block erase: 8 K+ 256 bytes n Block architecture — 8 Kbyte blocks+ 256 byte spare area (separately erasable, readable, and programmable) — 512 byte page+ 16 byte spare area for ECC and other system overhead information n Fast read and program performance (typical values) — Read: < 7 μs initial, < 50 ns sequential — Program: 200 μs (full page program at 400 ns/byte) — Erase: < 2 ms/8 Kbyte block n Pinout and package — Industry Standard NAND compatible pinout with 8-bit I/O bus and control signals — TSOP-II 44/40 pin package (standard and reverse) with copper lead frame for higher reliability — 40-ball FBGA package provides higher reliability
Date : 2025-12-20 Size : 828kb User : enyou