Search - Image segmentation

Search - Image segmentation - List

[VHDL-FPGA-Verilog] sobel DL : 2: 这是本人自己编写的可用于256*256大小的图像进行sobel边缘检测的vhd文件，可在QuartusII或MaxplisII下综合和仿真，并在FPGA上测试过。可以进行修改支持其他大小图像的sobel边缘检测，同时还可以实现其它的图像模块化处理算法，例如高斯滤波，平滑等。-this is my own preparation for the 256* 256 size of the image segmentation Edge Detection vhd document in the next QuartusII or MaxplisII integrated and simulation, and the FPGA tested. Can be adapted to support other size image segmentation edge detection, It can also achieve other modular image processing algorithms, such as Gaussian filtering, smoothing and so on.
Date : 2025-12-13 Size : 3kb User : 刘洋
[VHDL-FPGA-Verilog] 2 DL : 0: 图像分割，将运动图像从背景图像中提取出来。-Image segmentation, the moving image extracted from the background image.
Date : 2025-12-13 Size : 1kb User : 成语
[VHDL-FPGA-Verilog] 31296363kmeans1 DL : 0: 图像分割，能够很好的提取运动图像，比较清晰。-Image segmentation, the extraction of moving images can be very good, relatively clear.
Date : 2025-12-13 Size : 1kb User : 成语
[VHDL-FPGA-Verilog] ImageDivision DL : 0: 基于SystemGenerator的图像分割，成功在XilinxFPGA上验证，附带网表。-Based on the image segmentation SystemGenerator, success on the XilinxFPGA verified with the netlist.
Date : 2025-12-13 Size : 3.84mb User : Justin Bieber
[VHDL-FPGA-Verilog] tnn7_code_201212141110 DL : 0: 人脸检测与跟踪是一个重要而活跃的研究领域，它在视频监控、生物特征识别、视频编码等领域有着广泛的应用前景。该项目的目标是在FPGA板上实现实时系统来检测和跟踪人脸。人脸检测算法包括肤色分割和图像滤波。通过计算被检测区域的质心来确定人脸的位置。该算法的软件版本独立实现，并在matlab的静止图像上进行测试。虽然从MATLAB到Verilog的转换没有预期的那样顺利，实验结果证明了实时系统的准确性和有效性，甚至在不同的光线、面部姿态和肤色的条件下也是如此。所有硬件实现的计算都是以最小的计算量实时完成的，因此适合于功率受限的应用。(Face detection and tracking is an important and active research field, and it has a wide range of applications in video surveillance, biometrics, video coding and other fields. The goal of the project is to implement real-time systems on the FPGA board to detect and track faces. Face detection algorithms include skin segmentation and image filtering. The location of the human face is determined by calculating the centroid of the detected region. The software version of the algorithm is implemented independently and tested on MATLAB still images. Although the conversion from MATLAB to Verilog is not as smooth as expected, the experimental results demonstrate the accuracy and effectiveness of real-time systems, even in different light, facial gestures and color conditions. All hardware implementations are performed in real-time with minimal computational complexity and are therefore suitable for power constrained applications.)
Date : 2025-12-13 Size : 62kb User : 合发
[VHDL-FPGA-Verilog] hheev DL : 0: Consider shadow rain attenuation and multipath effects Particle image segmentation and matching subroutines themselves are prepared, Modulated signals to calculate its density Pu-related.
Date : 2025-12-13 Size : 4kb User : sunjenggeng
[VHDL-FPGA-Verilog] dm018 DL : 0: Interpolation and fitting, solution of equations, data analysis, Prediction Error Method for Parameter Identification - the idea of relaxation, Particle image segmentation and matching subroutines themselves are prepared.
Date : 2025-12-13 Size : 6kb User : yingkoufengging
[VHDL-FPGA-Verilog] vsmkq DL : 0: Particle image segmentation and matching subroutines themselves are prepared, Is the topic of the elementary school stage curriculum design, High-resolution array signal processing estimates.
Date : 2025-12-13 Size : 4kb User : gieewhbn
[VHDL-FPGA-Verilog] 35_OV7725_VGA_DDR3_LX16_joint DL : 0: 多目摄像头同屏显示，实现图像分割，xilinx公司芯片，ISE平台开发(Multi camera on the same screen display, image segmentation, Xilinx company chip, ISE platform development)
Date : 2025-12-13 Size : 15.24mb User : 黑色命运d幽默