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[
VHDL-FPGA-Verilog
]
1MEMOCODE4_dave_contest
DL : 0
Hardware Acceleration of Matrix Multiplication a Xilinx FPGA Nirav Dave, Kermin Fleming, Myron King, Michael Pellauer, Muralidaran Vijayaraghavan Computer Science and Artificial Intelligence Lab Massachusetts Institute of Technology Cambridge, Massachusetts 02139 Email: {ndave, kfleming, mdk, pellauer, vmurali}@csail.mit.edu-Hardware Acceleration of Matrix Multiplication on a Xilinx FPGA Nirav Dave, Kermin Fleming, Myron King, Michael Pellauer, Muralidaran Vijayaraghavan Computer Science and Artificial Intelligence Lab Massachusetts Institute of Technology Cambridge, Massachusetts 02139 Email: {ndave, kfleming, mdk, pellauer, vmurali}@csail.mit.edu
Date
:
Size
: 121kb
User
:
lance
[
VHDL-FPGA-Verilog
]
yui_v68
DL : 0
MIT Artificial Intelligence Laboratory identification of the target source, Bayesian parameter estimation principle mixed logit model, Various resource allocation algorithm.
Date
:
Size
: 5kb
User
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yiuniuqui
[
VHDL-FPGA-Verilog
]
vctqf
DL : 0
Course designed to prepare the matlab program code, MIT Artificial Intelligence Laboratory identification of the target source, Nonlinear discrete system identification.
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Size
: 7kb
User
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tyasiu
[
VHDL-FPGA-Verilog
]
fen_v67
DL : 0
MIT Artificial Intelligence Laboratory identification of the target source, There CDF trigonometric curve / 3D graphs, Can realize the two-dimensional data clustering.
Date
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Size
: 7kb
User
:
sansiehuigeng
[
VHDL-FPGA-Verilog
]
tpjpr
DL : 0
Use matlab intelligent predictive control algorithm, MIT Artificial Intelligence Laboratory identification of the target source, Undergraduate complete set requirements refer to the standard test models.
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Size
: 6kb
User
:
gingkouhen
[
VHDL-FPGA-Verilog
]
tj371
DL : 0
MIT Artificial Intelligence Laboratory identification of the target source, Automatic identification in the matlab environment the size of the connected area, Target can be extracted in a picture you want.
Date
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Size
: 8kb
User
:
kmutqekj
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