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[
VHDL-FPGA-Verilog
]
S6_VGA_change
DL : 0
1。源文件保存在src目录,QII的工程文件保存在Proj目录; 2。程序可以在VGA显示器上以800x600分辨率显示方波示例和字母示例 3。具体设计参考代码。 -1. Save the source file in the src directory, QII project files in the directory Proj 2. Program can display at VGA display with 800x600 resolution and square-wave sample letters Example 3. Specific design reference code.
Date
: 2025-12-17
Size
: 3.11mb
User
:
成语
[
VHDL-FPGA-Verilog
]
I2C
DL : 0
简单实用的一个I2C FPGA代码,在很多工程设计中很需要的哈-One sample I2C code,used to FPGA at some engneer.
Date
: 2025-12-17
Size
: 1.3mb
User
:
eric
[
VHDL-FPGA-Verilog
]
msp430x41x
DL : 0
低电源电压范围为1.8 V至3.6 V 超低功耗: - 主动模式:280μA,在1 MHz,2.2伏 - 待机模式:1.1μA - 关闭模式(RAM保持):0.1μA 五省电模式 欠待机模式唤醒 超过6微秒 16位RISC架构, 125 ns指令周期时间 12位A/ D转换器具有内部 参考,采样和保持,并 AutoScan功能 16位Timer_B随着三† 或七‡ 捕捉/比较随着阴影寄存器 具有三个16位定时器A 捕捉/比较寄存器 片上比较器 串行通信接口(USART), 选择异步UART或 同步SPI软件: - 两个USART(USART0 USART1)的† - 一个USART(USART0)‡ 掉电检测 电源电压监控器/监视器 可编程电平检测 串行板载编程, 无需外部编程电压 安全可编程代码保护 融合-Low Supply-Voltage Range, 1.8 V to 3.6 V Ultralow-Power Consumption: − Active Mode: 280 µ A at 1 MHz, 2.2 V − Standby Mode: 1.1 µ A − Off Mode (RAM Retention): 0.1 µ A Five Power Saving Modes Wake-Up From Standby Mode in Less Than 6 µ s 16-Bit RISC Architecture, 125-ns Instruction Cycle Time 12-Bit A/D Converter With Internal Reference, Sample-and-Hold and Autoscan Feature 16-Bit Timer_B With Three† or Seven‡ Capture/Compare-With-Shadow Registers 16-Bit Timer_A With Three Capture/Compare Registers On-Chip Comparator Serial Communication Interface (USART), Select Asynchronous UART or Synchronous SPI by Software: − Two USARTs (USART0, USART1)† − One USART (USART0)‡ Brownout Detector Supply Voltage Supervisor/Monitor With Programmable Level Detection Serial Onboard Programming, No External Programming Voltage Needed Programmable Code Protection by Security Fuse
Date
: 2025-12-17
Size
: 1.84mb
User
:
苏春明
[
VHDL-FPGA-Verilog
]
CX3FPGA_PCM
DL : 0
PCM 脉冲编码调制是Pulse Code Modulation的缩写。脉冲编码调制是数字通信的编码方式之一。主要过程是将话音、图像等模拟信号每隔一定时间进行取样,使其离散化,同时将抽样值按分层单位四舍五入取整量化,同时将抽样值按一组二进制码来表示抽样脉冲的幅值。-PCM Pulse Code Modulation is the abbreviation for Pulse Code Modulation. Pulse code modulation coding scheme is one of digital communication. The main process is a voice, images and the analog signal is sampled at predetermined time intervals, so that the discretization, while the sample values are rounded hierarchical quantization unit, while the sample values are set according to a binary code of the sampling pulse width value.
Date
: 2025-12-17
Size
: 3.54mb
User
:
张涵
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