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Search - 4-way traffic light control system - List
[
VHDL-FPGA-Verilog
]
EDA5
DL : 0
交通灯控制器设计:1.有MR(主红)、MY(主黄)、MG(主绿)、CR(乡红)、CY(乡黄)、CG(乡绿)六盏交通灯需要控制; 2.交通灯由绿→红有4秒黄灯亮的间隔时间,由红→绿没有间隔时间; 3.系统有MRCY、MRCG、MYCR、MGCR四个状态; 4.相间公路右侧各埋有一个传感器,当有车辆通过相间公路时,发出请求信号S; 5.平时系统停留在MGCR状态,一旦S信号有效,经MRCY转入MRCG状态,但要保证MRCG状态也不得短于一分钟; 6.一旦S信号无效,系统脱离MRCG状态。随即经MRCY转入进入MGCR状态,计时S信号一直有效,MRCG状态也不得长于20秒钟。 -Traffic light controller design: 1. With MR (the main red), MY (Master Wong), MG (Master Green), CR (township red), CY (Rural yellow), CG (village green) six traffic lights need to control 2. → red traffic light from green to bright yellow with 4 seconds intervals, not from red → green interval 3. System MRCY, MRCG, MYCR, MGCR four states 4. The right side of the road white buried a sensor, when a vehicle through the white road, the request signal S 5. MGCR usually stay in the state system, once the S signal is valid, the MRCY into MRCG state, but also to ensure that the state shall not be less MRCG one minute 6. Once the S signal is invalid, the system from MRCG state. Then transferred into MGCR by MRCY state S signal timing has been effective, MRCG status is no longer than 20 seconds.
Date
: 2025-12-24
Size
: 1013kb
User
:
周旋
[
VHDL-FPGA-Verilog
]
fpga-report
DL : 0
4-way traffic light control system
Date
: 2025-12-24
Size
: 411kb
User
:
sohaib1272
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