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[VHDL-FPGA-Verilog] bin27seg_vhdl DL : 0: 采用VHDL编写的七段数码管显示程序-prepared using VHDL paragraph 107 of the procedures Digital Display
Date : 2025-12-20 Size : 1kb User : 陈旭
[VHDL-FPGA-Verilog] 5555 DL : 0: 微波炉定时器集成电路的设计 1、控制状态机：工作状态状态转换。 2、数据装入电路：根据控制信号选择定时时间、测试数据或完成信号的装入。 3、定时器电路：负责完成烹调过程中的时间递减计数和数据译码供给七段数码显示，同时还可以提供烹调完成时间的状态信号供控制状态机产生完成信号。 -microwave timer IC design a control state machine : state of the state conversion work. 2, data loading circuit : According to choose control signal timing, or the completion of the test data signal load. 3, timer circuit : responsible for the completion of the cooking process of counting and time decreasing supply data decoding digital paragraph 107, while cooking can also provide time to complete state control signal for the state machine generated signals.
Date : 2025-12-20 Size : 299kb User : 吴倩
[VHDL-FPGA-Verilog] led_decode DL : 0: 用veilog HDL编的七段译码显示电路。自己做的第一个此类程序，编译仿真通过，感觉不错-veilog HDL series with paragraph 107 of the decoder show circuit. I have done the first such procedure, compile through simulation, feeling good
Date : 2025-12-20 Size : 2kb User : 孙忠诚
[VHDL-FPGA-Verilog] COUNT_4qiduan DL : 0: VHDL源代码.设计一个模为4的计数器，并在实验箱上用七段数码管显示结果-VHDL source code. Design a scale of four counters, and the experimental box used in paragraph 107 of Digital Display Results
Date : 2025-12-20 Size : 1kb User : sky
[VHDL-FPGA-Verilog] ps2mouse_verilog DL : 0: 本实验利用PS/2接口实现了与鼠标通信，并将鼠标的按键信息通过D6，D7，D8，D9 来直观的放映，其中D6，D7代表鼠标右键的状态，当鼠标右键没有按下时，D6，D7两个灯都不亮，当鼠标右键有按下时，D6，D7两个灯同时点亮。与此相同，D8，D9则代表鼠标左键的状态。而鼠标的移动状态，我们是通过七段数码管来表示，低两位的数码管表示X轴的移动点数，高两位的数码表示Y轴的移动点数。-the experimental use of PS/2 interface with the click of the mouse communications, and the mouse buttons and information through D6. D7, D8, D9 to visual screening, D6, D7 right-clicking on behalf of the state, with the right mouse button pressed, D6, D7 two lights are not bright, with the right mouse button is pressed, D6, D7 while two lights lit. Likewise, D8, D9, on behalf of the state of the left mouse button. And the movement of the mouse state, we agreed to in paragraph 107 of the digital control, low two digital X-axis of said mobile Points Gao said the two digital mobile Y-axis points.
Date : 2025-12-20 Size : 12kb User : dragon
[VHDL-FPGA-Verilog] sin_gen DL : 0: 弦波產生+七段顯示器顯示目前該弦波點之數值-have grounded in paragraph 107 of the display shows the current Numerical grounded point
Date : 2025-12-20 Size : 411kb User : Jyun-Hong Lin
[VHDL-FPGA-Verilog] part5_update DL : 0: 2个4位二进制数相加的加法器件，其结果显示在七段译码器中-two four binary adder Addition of a few devices, and the results showed that in paragraph 107 of the decoder which
Date : 2025-12-20 Size : 377kb User : 张宇辉
[VHDL-FPGA-Verilog] vdemo_p107_traligt_2015-07-06 DL : 0: 自己写的教科书中的例子，《verilog hdl数字设计与综合（第二版）》107页，交通灯的例子。主干路与乡村路交通灯控制。verilog源码，modelsim仿真通过。--verilog, modelsim, traffic light control
Date : 2025-12-20 Size : 1.04mb User : chiahmk