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Search - for generate vhdl - List
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mif
DL : 0
使用metlab生产正弦波和三角波的采样值,供vhdl等语言调用来产生波形-use metlab production sine wave and triangular wave of sampling, for languages such as call vhdl to generate waveforms
Date
: 2026-01-10
Size
: 1kb
User
:
feng
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Other
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Trafficlight
DL : 0
系统设置一个两位BCD码倒计时计数器(计数脉冲1HZ),用于记录各状态持续时间; 因为各状态持续时间不一致,所以上述计数器应置入不同的预置数; 倒计时计数值输出至二个数码管显示; 程序共设置4个进程: ① 进程P1、P2和P3构成两个带有预置数功能的十进制计数器,其中P1和P3分别为个位和十位计数器,P2产生个位向十位的进位信号; ② P4是状态寄存器,控制状态的转换,并输出6盏交通灯的控制信号。-System to set up a two BCD code countdown counter (count pulse 1HZ), used to record the duration of each state because the duration of each state are inconsistent, so these counters should be placed in several different presets countdown of numerical output to two digital display procedures were set up four processes: ① process P1, P2 and P3 form two functions with a preset number of decimal counters, of which P1 and P3, respectively, for months, and 10-bit counters, P2 to generate a 10-bit The binary signal ② P4 is the status register, control the state of the conversion, and six output control signals of traffic lights.
Date
: 2026-01-10
Size
: 1kb
User
:
kid
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Other
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DDS
DL : 0
本设计基于数字频率合成技术,采用正弦查找表实现波形产生.直接数字频率合成技术(DDS)是一种先进的电路结构,能在全数字下对输出信号频率进行精确而快速的控制,DDS技术还在解决输出信号频率增量选择方面具有很好的应用,DDS所产生的信号具有频率分辨率高、频率切换速度快、频率切换时相位连续、输出相位噪声低和可以产生任意波形等诸多优点。 文中介绍了DDS的基本原理,对DDS的质谱及其散杂抑制进行了分析。程序设计采用超高速硬件描述语言VHDL描述DDS,在此基础上设计了正弦波、三角波、方波等信号发生器,。完成了软件和硬件的设计,以及实验样机的部分调试。-The design is based digital frequency synthesizer technology, using a sine lookup table to achieve waveform generation. Direct digital frequency synthesis (DDS) is an advanced circuit structure can fully digital output signal frequency under precise and fast control, DDS technology also solve the incremental output signal frequency selection signal having a very good application, DDS generated by high frequency resolution, frequency switching speed, phase-continuous frequency switching time, low phase noise output and can generate arbitrary waveforms, and many other advantages . This paper introduces the basic principles of the DDS, DDS MS for its bulk inhibition were analyzed. Programming using ultra high-speed hardware description language VHDL description DDS, on the basis of the design of the sine wave, triangle wave, square wave signal generator. Completed part of debugging software and hardware design, and the experimental prototype.
Date
: 2026-01-10
Size
: 4.28mb
User
:
冯阳
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Other
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210刘俊皓实验6
DL : 0
设计并实现一个随机数生成电路每 2 秒随机生成一个 0~999 之间的数字,并在数码管上显示生成的随机数。 2、为系统设置一个复位键,复位后数码管显示自己学号的后三位数字,2秒后再开始每2秒生成并显示随机数,可以不需要防抖(A random number generating circuit is designed and implemented to generate a random number between 0 and 999 every 2 seconds, and display the generated random number on the nixie tube. 2. Set a reset key for the system. After reset, the nixie tube will display the last three digits of its student number. After 2 seconds, it will start generating and displaying random numbers every 2 seconds. It can be without anti shake)
Date
: 2020-07-11
Size
: 246kb
User
:
幽浮的幽
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