Search - MAX PLUS II

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[Other] f_add DL : 0: 本文件包是在MAX+plus II 软件环境下实现半加器的逻辑功能-This document packet was MAX+ Plus II software environment to achieve a half-adder logic function
Date : 2026-01-01 Size : 12kb User : 罗理平
[Other] h_adder DL : 0: 本文件包是在MAX+plus II 软件环境下实现全加器的逻辑功能-This document packet was MAX+ Plus II software environment to achieve full adder logic function
Date : 2026-01-01 Size : 13kb User : 罗理平
[Other] mendianlu DL : 0: 本文件包是在MAX+plus II 软件环境下验证门电路的逻辑功能-This document packet was MAX+ Plus II software environment to verify the logic function circuit door
Date : 2026-01-01 Size : 12kb User : 罗理平
[Other] count DL : 0: 本文件包是在MAX+plus II 软件环境下实现计数器的逻辑功能-This document packet was MAX+ Plus II software environment counters realize the logic function
Date : 2026-01-01 Size : 57kb User : 罗理平
[Other] 1_061227123744 DL : 0: max plus的入门与应用，适合初学者对max plus ii有一个感性的认识-max plus entry and applications, suitable for beginners to the max plus ii have a perceptual awareness of
Date : 2026-01-01 Size : 232kb User : da
[Other] MaxPlusChineseTuturial DL : 0: max-plus 简单用户使用入门指南。包括软件安装，图形设计，编译，定时分析，器件编程等详细介绍。-Max+Plus II Chinese Tuturial
Date : 2026-01-01 Size : 404kb User : 文静
[Other] MaxPPlus-II DL : 0: maxplusII教程 Max+Plus II 简易用户使用入门指南-maxplusII teaching material Simple user use portal guide
Date : 2026-01-01 Size : 228kb User : sherry
[Other] verilog_hdl DL : 0: You can now read the brochure in the Quartus II. Altera ® the Quartus ® II design software is suitable for The most comprehensive single-chip programmable system (SOPC) design environment. If you have previously used MAX + PLUS ® II software, and other design software or ASIC design software and are ready to switch Quartus II software, or if you have some understanding of the Quartus II software, but want to learn more Its functions, this manual is for you. -verilog_hdl Language Tutorial
Date : 2026-01-01 Size : 1.28mb User : 任耀庭
[Other] stopwatch DL : 0: 24小时计时表和计数译码显示电路的编程，显示秒、分、小时， MAX+plus II 仿真。-24 hours stopwatch and count decoding display circuit programming, display seconds, points, hours, MAX+ plus II simulation.
Date : 2026-01-01 Size : 213kb User : 宋辉
[Other] 6renqiangdaqi DL : 0: 包括做实验的所有文件打包给大家啦，MAX+plus II设计电路图，gdf文件，mod文件，报告书，一切齐全啦，当时被评为优秀成绩的，特别推荐给大家，电路绝对优秀，直接上机操作，导入电路图即可验证演示。-Including all the files packaged experiment to you friends, MAX+ plus II design schematics, gdf files, mod files, reports, everything is complete you, then was named outstanding achievements, particularly recommended for everyone, circuit absolutely outstanding, directly on the machine operation, import circuit can verify demonstration.
Date : 2026-01-01 Size : 349kb User : zxy
[Other] dianzimimasuo DL : 0: 南京工程学院数电课程设计电子密码锁所有实验文件打包.包括做实验的所有文件打包给大家啦，MAX+plus II设计电路图，gdf文件，mod文件，报告书，一切齐全啦，当时被评为优秀成绩的，特别推荐给大家，电路绝对优秀，直接上机操作，导入电路图即可验证演示。-Number of Nanjing Institute of Electrical curriculum design electronic locks files packaged all experiments, including experiments, all files are packaged to give you friends, MAX+ plus II design schematics, gdf files, mod files, reports, everything is complete you, then was named excellent results, especially recommended for everyone, circuit absolutely outstanding, directly on the machine operation, import circuit can verify demonstration.
Date : 2026-01-01 Size : 53kb User : zxy