Search - Design Compiler

Search - Design Compiler - List

[Other] 赋值语句翻译 DL : 0: ：这个是我在编译原理做的课程设计,一个编译器,包括词法语法分析,结果生成四元式序列,可执行文件也在里面:),this is what I do in compiler theory of curriculum design, a compiler, including syntax analysis, the results generated four yuan-sequence, also executable file inside :)
Date : 2011-11-02 Size : 107.81kb User : haojin1989@qq.com
[Other] 编译原理First集合和Follow集合的求解 DL : 0: 相信计算机专业的学生在学《编译原理》时都做了有关求first和follow集的问题。此程序用VC++做，相信会给大家一定的帮助。-it s sure that the student of computer do first and follow when learning <<compiler>>. This program uses vc++,and i am sure it is useful for everyone!
Date : 2025-12-18 Size : 331kb User : 如月
[Other] YACC DL : 0: YACC的使用方法和PP2实验说明编译原理课程设计-YACC the use of methods and PP2 experiments Course Design Compiler Principle
Date : 2025-12-18 Size : 28kb User : gengchen
[Other] WindowsApplication1 DL : 0: 基于编译原理的表达式计算器使用算符优先算法实现了表达式计算器，能分析用户输入的表达式是否正确，支持括号运算、浮点运算、简单的四则运算、复杂的表达式运算、进制之间的相互转换等。操作简单，界面清晰。-Design of the expression calculator based on the compiler theory
Date : 2025-12-18 Size : 83kb User : 周某某
[Other] final DL : 0: 编译原理课程设计 while循环语句翻译 LL1，三地址-Principles of curriculum design compiler while the translation loop LL1, three address
Date : 2025-12-18 Size : 3kb User : wori
[Other] Compiler DL : 0: 正规文法到正规式的算法实现编译原理课程设计-Of grammar-based algorithm to the formal principles of curriculum design to achieve the compiler
Date : 2025-12-18 Size : 615kb User : 刘玮
[Other] Advanced.ASIC.Chip.Synthesis.Using.Synopsys.Design DL : 0: 使用synopsys design compiler和 prime time进行Asic开发的英文pdf-Advanced.ASIC.Chip.Synthesis.Using.Synopsys.Design.Compiler.Physical.Compiler.And.Primetime
Date : 2025-12-18 Size : 3.89mb User : rocky
[Other] cifa DL : 0: 词法分析，编译原理课程设计词法分析，四川大学软件学院编译原理课程设计-Lexical analysis, principles of curriculum design compiler lexical analysis, Sichuan University, School of Software Principles of Course Design Compiler
Date : 2025-12-18 Size : 193kb User : 党孟光
[Other] bianyiyuanli DL : 0: 编译原理实验指导，词法分析，语法分析及设计，编译原理课要用-Compiler Construction Principles experimental guidance, lexical analysis, syntax analysis and design, compiler theory class to use
Date : 2025-12-18 Size : 72kb User : 小八
[Other] do-while DL : 0: do-while循环语句的翻译（递归下降法。输出三地址），编译原理课程设计-do-while loop statement translation (recursive descent method. Output 3 addresses) Principles of Course Design Compiler
Date : 2025-12-18 Size : 133kb User : xhouyan
[Other] DDFS_DC DL : 0: 用sysnopsys 综合工具design compiler 做综合的TLC脚本-Integrated tool design compiler with sysnopsys do comprehensive TLC script
Date : 2025-12-18 Size : 1kb User : jessie
[Other] Algorithms-for-Compiler-Design---O.G.-Kakde---Cha DL : 0: Algorithms for Compiler Design - O.G. Kakde - Charles River - ISBN 1584501006
Date : 2025-12-18 Size : 9.76mb User : saj
[Other] Compiler-theory-experiments DL : 0: 通过设计、编制、调试典型的SLR（1）语法分析程序，实现对实验一所得词法分析程序所提供的单词序列进行语法检查和结构分析，进一步掌握常用的语法分析方法。-A typical SLR (1) parser through the design, development, debugging, syntax checking and structural analysis of lexical analysis program, the experimental one obtained by the sequence of words, to further understand the common syntax analysis method.
Date : 2025-12-18 Size : 37kb User : 哈达
[Other] SeaLeaf-BasicV1.0 DL : 1: 一个使用VB编写的，指令型程序设计编译器。-Written using VB, instruction type program design compiler.
Date : 2025-12-18 Size : 53kb User : 钱泽林
[Other] CPP-The-compiler DL : 0: C++ 编译器原码编译原理课程设计完美运行-C++ original code compiler compiler theory curriculum design perfect run
Date : 2025-12-18 Size : 1.92mb User : 李青
[Other] Compiler DL : 0: 使用C语言编程实现的自行设计的简单语言编译器-Use a simple C language programming language compiler design their own
Date : 2025-12-18 Size : 355kb User : huxuejiao
[Other] lab2_synopsys_dc DL : 0: ECE 128 – Synopsys Tutorial: Using the Design Compiler Objectives:  Synthesize a “structural” 1-bit full adder using the Synopsys Design Compiler  Synthesize a “behavioral” 1-bit full adder using the Synopsys Design Compiler  Synthesize both full adders using the AMI .5 library using the OSU Standardized Cells-ECE 128 – Synopsys Tutorial: Using the Design Compiler Objectives:  Synthesize a “structural” 1-bit full adder using the Synopsys Design Compiler  Synthesize a “behavioral” 1-bit full adder using the Synopsys Design Compiler  Synthesize both full adders using the AMI .5 library using the OSU Standardized Cells
Date : 2025-12-18 Size : 631kb User : yosso
[Other] remove_dc_input_tieoffs DL : 0: Design Compile综合RTL时，工具默认将tie 0的port优化掉，运用此脚本，可以将tie 0的port保持住。-When do synthesis, Design Compiler will optimize the tie 0 ports as default. This tool/script can keep the tie 0 ports in the output netlist.
Date : 2025-12-18 Size : 1kb User : 胡生
[Other] pl0-compiler DL : 0: 采用递归下降的方法来设计PL/0编译，在词法分析部分的基础上，加入语法分析功能，。-Using recursive descent approach to the design PL/0 compiler.
Date : 2025-12-18 Size : 427kb User : 谢逸维
[Other] dc DL : 0: 使用synopsys的DESIGN COMPILER逻辑综合工具，流程通用脚本-the scripts of DESIGN COMPILER for synthesis
Date : 2025-12-18 Size : 1kb User : 陈先生

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