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Category : SCM
Tags :
- Update : 2012-11-26
- Size : 28kb
- Downloaded :0次
- Author :王***
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Introduction - If you have any usage issues, please Google them yourself
SPI bus is a ring structure, by ss (cs), sck, sdi, sdo composition, its timing is actually very simple, mainly under the control of the sck and two bi-directional shift register for data exchange. Assuming the following 8-bit register is loaded to send the data to be 10,101,010, rising to send, receive falling edge, high first sent. Well, the first rising edge to the time data will be sdo = 1 register = 0101010x. Falling edge comes, sdi on the level will be stored to the register, then register at this time = 0101010sdi, so 8 clock pulse later, the contents of two registers to exchange time. This will be completed in a spi timing.
Packet file list
(Preview for download)
burst_master
............\build.bat
............\burst_master.mcp
............\burst_master.mcw
............\source
............\......\burst_master.c
burst_slave
...........\build.bat
...........\burst_slave.mcp
...........\burst_slave.mcw
...........\source
...........\......\burst_slave.c
loopback
........\build.bat
........\loopback.mcp
........\loopback.mcw
........\source
........\......\loopback.c
master_slave
............\build.bat
............\master_slave.mcp
............\master_slave.mcw
............\source
............\......\master_slave.c
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