realiaztion of timer16 using verilog

seller_moore\seller_moore.cr.mti
............\seller_moore.mpf
............\seller_moore.v
............\seller_moore.v.bak
............\tb_seller_moore.v
............\tb_seller_moore.v.bak
............\vsim.wlf
............\work\seller_moore\verilog.asm
............\....\............\verilog.rw
............\....\............\_primary.dat
............\....\............\_primary.dbs
............\....\............\_primary.vhd
............\....\tb_seller_moore\verilog.asm
............\....\...............\verilog.rw
............\....\...............\_primary.dat
............\....\...............\_primary.dbs
............\....\...............\_primary.vhd
............\....\_info
............\....\.temp\vlog0z4e38
............\....\.....\vlog3fgrsy
............\....\.....\vlog67hdyt
............\....\.....\vlogai62ih
............\....\.....\vlogcnr7ee
............\....\.....\vlogg27v9j
............\....\.....\vlogg2k6t3
............\....\.....\vlogg85h80
............\....\.....\vlogjb3bg0
............\....\.....\vlogjnync1
............\....\.....\vlogkj8trd
............\....\.....\vlogvfwzxw
............\....\.....\vlogvkjkte
............\....\.....\vlogwtmknz
............\....\_vmake
............\....\seller_moore
............\....\tb_seller_moore
............\....\_temp
............\work
seller_moore

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