A lock of this program, the development board running sapphire. Four pre-set password, if the input is displayed on the right, if you enter the wrong three times in a row lock.

finalvhdl\7coding.vhd
.........\7coding_tb_bencher.prj
.........\cmp.spl
.........\cmp.sym
.........\cmp.vhd
.........\cmp_tb.ant
.........\cmp_tb.jhd
.........\cmp_tb.tbw
.........\cmp_tb.xwv
.........\cmp_tb.xwv_bak
.........\cmp_tb_bencher.prj
.........\coding.spl
.........\coding.sym
.........\coding.vhd
.........\coding_tb.ant
.........\coding_tb.jhd
.........\coding_tb.tbw
.........\coding_tb.xwv
.........\coding_tb.xwv_bak
.........\coding_tb_bencher.prj
.........\device_usage_statistics.html
.........\divfrq.spl
.........\divfrq.sym
.........\divfrq.vhd
.........\divfrq_tb.ant
.........\divfrq_tb.jhd
.........\divfrq_tb.tbw
.........\divfrq_tb.vhw
.........\divfrq_tb.xwv
.........\divfrq_tb.xwv_bak
.........\divfrq_tb_bencher.prj
.........\divfrq_tb_isim_par.exe
.........\divfrq_tb_par.prj
.........\dyn.spl
.........\dyn.sym
.........\dyn.vhd
.........\dyn_tb.ant
.........\dyn_tb.jhd
.........\dyn_tb.tbw
.........\dyn_tb.xwv
.........\dyn_tb.xwv_bak
.........\dyn_tb_bencher.prj
.........\finalvhdl.bgn
.........\finalvhdl.bit
.........\finalvhdl.bld
.........\finalvhdl.cmd_log
.........\finalvhdl.drc
.........\finalvhdl.ise
.........\finalvhdl.ise_ISE_Backup
.........\finalvhdl.jhd
.........\finalvhdl.lfp
.........\finalvhdl.lso
.........\finalvhdl.ncd
.........\finalvhdl.ngc
.........\finalvhdl.ngd
.........\finalvhdl.ngr
.........\finalvhdl.ntrc_log
.........\finalvhdl.pad
.........\finalvhdl.par
.........\finalvhdl.pcf
.........\finalvhdl.prj
.........\finalvhdl.sch
.........\finalvhdl.schbak
.........\finalvhdl.schcmd
.........\finalvhdl.stx
.........\finalvhdl.syr
.........\finalvhdl.twr
.........\finalvhdl.twx
.........\finalvhdl.ucf
.........\finalvhdl.unroutes
.........\finalvhdl.ut
.........\finalvhdl.vhd
.........\finalvhdl.vhf
.........\finalvhdl.xpi
.........\finalvhdl.xst
.........\finalvhdl_guide.ncd
.........\finalvhdl_map.map
.........\finalvhdl_map.mrp
.........\finalvhdl_map.ncd
.........\finalvhdl_map.ngm
.........\finalvhdl_pad.csv
.........\finalvhdl_pad.txt
.........\finalvhdl_summary.html
.........\finalvhdl_summary.xml
.........\finalvhdl_usage.xml
.........\finalvhdl_vhdl.prj
.........\isim\work\divfrq_tb\mingw\testbench_arch.obj
.........\....\....\.........\testbench_arch.h
.........\....\....\.........\xsimtestbench_arch.cpp
.........\....\....\hdllib.ref
.........\....\....\hdpdeps.ref
.........\....\....\sub00\vhpl00.vho
.........\....\....\.....\vhpl01.vho
.........\isim.cmd
.........\isim.log
.........\.....tmp_save\_1
.........\netgen\par\finalvhdl_timesim.nlf
.........\......\...\finalvhdl_timesim.sdf
.........\......\...\finalvhdl_timesim.vhd
.........\nonshake.cmd_log

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