VLSI Lab: design FA,counter, inverter, dflipflop, NAND gate,

VLSI Lab
........\Part A
........\......\4bit-counter
........\......\............\bincntr.v
........\......\............\counter.testbench.v
........\......\dFlipFlop
........\......\.........\dFlipFlop.testbench.v
........\......\.........\dFlipFlop.v
........\......\fullAdder
........\......\.........\fullAdder.testbench.v
........\......\.........\fullAdder.v
........\......\Inverter
........\......\........\inv.testbench.v
........\......\........\inv.v
........\......\jkFlipFlop
........\......\..........\jkFlipFlop.testbench.v
........\......\..........\jkFlipFlop.v
........\......\NAND
........\......\....\nand.testbench.v
........\......\....\nand.v
........\......\OR
........\......\..\or.testbench.v
........\......\..\or.v
........\......\tFlipFlop
........\......\.........\tFlipFlop.testbench.v
........\......\.........\tFlipFlop.v
........\Part B
........\......\commonSource
........\......\............\commonSource-pavan.jpg
........\......\inverter
........\......\........\inv-pavan.jpg
........\......\NAND
........\......\....\NAND-pavan.jpg
........\......\....\nand.spice netlist.cir
........\......\NOR
........\......\...\nor-pavan.jpg
........\......\opamp
........\ReadMe.txt

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