UART_DMA way is to use uart dma transfer nios implemented in the hardware platform validated by

UART_DMA\.sopc_builder\filters.xml
........\.............\install.ptf
........\.............\install2.ptf
........\.............\preferences.xml
........\altpllpll.ppf
........\altpllpll.qip
........\altpllpll.v
........\altpllpll_0.ppf
........\altpllpll_0.qip
........\altpllpll_0.v
........\altpllpll_0_wave0.jpg
........\altpllpll_0_waveforms.html
........\AUDIO_IF_0.v
........\cpu_0.ocp
........\cpu_0.sdc
........\cpu_0.v
........\cpu_0_bht_ram.mif
........\cpu_0_dc_tag_ram.mif
........\cpu_0_ic_tag_ram.mif
........\cpu_0_jtag_debug_module_sysclk.v
........\cpu_0_jtag_debug_module_tck.v
........\cpu_0_jtag_debug_module_wrapper.v
........\cpu_0_mult_cell.v
........\cpu_0_ociram_default_contents.mif
........\cpu_0_oci_test_bench.v
........\cpu_0_rf_ram_a.mif
........\cpu_0_rf_ram_b.mif
........\cpu_0_test_bench.v
........\db\UART_DMA.db_info
........\..\UART_DMA.eco.cdb
........\..\UART_DMA.sld_design_entry.sci
........\DM9000A_IF_0.v
........\dma_0.v
........\DMA_SYSTEM.bsf
........\DMA_SYSTEM.html
........\DMA_SYSTEM.ptf
........\DMA_SYSTEM.ptf.8.0
........\DMA_SYSTEM.ptf.bak
........\DMA_SYSTEM.ptf.pre_generation_ptf
........\DMA_SYSTEM.qip
........\DMA_SYSTEM.sopc
........\DMA_SYSTEM.sopcinfo
........\DMA_SYSTEM.v
........\DMA_SYSTEM_clock_0.v
........\DMA_SYSTEM_clock_1.v
........\DMA_SYSTEM_clock_2.v
........\DMA_SYSTEM_clock_3.v
........\DMA_SYSTEM_clock_4.v
........\DMA_SYSTEM_clock_5.v
........\DMA_SYSTEM_clock_6.v
........\DMA_SYSTEM_clock_7.v
........\DMA_SYSTEM_generation_script
........\DMA_SYSTEM_inst.v
........\DMA_SYSTEM_log.txt
........\...........sim\atail-f.pl
........\..............\jtag_uart_0_input_mutex.dat
........\..............\jtag_uart_0_input_stream.dat
........\..............\jtag_uart_0_output_stream.dat
........\..............\uart_0_input_data_mutex.dat
........\..............\uart_0_input_data_stream.dat
........\..............\uart_0_log_module.txt
........\epcs_flash_controller_0.v
........\epcs_flash_controller_0_boot_rom.hex
........\IP\TERASIC_AUDIO\hdl\AUDIO_ADC.v
........\..\.............\...\AUDIO_DAC.v
........\..\.............\...\audio_fifo.v
........\..\.............\...\audio_fifo_wave0.jpg
........\..\.............\...\audio_fifo_wave1.jpg
........\..\.............\...\audio_fifo_waveforms.html
........\..\.............\...\AUDIO_IF.v
........\..\.............\...\AUDIO_IF.v.bak
........\..\.............\...\AUDIO_IF_hw.tcl
........\..\.............\software\AUDIO.c
........\..\.............\........\AUDIO.h
........\..\.............\........\AUDIO_REG.h
........\..\........Binary_VGA_Controller\hdl\Binary_VGA_Control_IF_hw.tcl
........\..\.............................\...\Binary_VGA_Control_IF_hw.tcl~
........\..\.............................\...\Img_DATA.hex
........\..\.............................\...\Img_RAM.v
........\..\.............................\...\VGA_Controller.v
........\..\.............................\...\VGA_NIOS_CTRL.v
........\..\.............................\...\VGA_NIOS_CTRL.v.bak
........\..\.............................\...\VGA_OSD_RAM.v
........\..\.............................\...\VGA_Param.h
........\..\........DM9000A\hdl\DM9000A_IF.v
........\..\...............\...\DM9000A_IF_hw.tcl
........\..\...............\...\DM9000A_IF_hw.tcl~
........\..\...............\software\DM9000A.C
........\..\...............\........\DM9000A.H
........\..\........ISP1362\hdl\ISP1362_IF.v
........\..\...............\...\ISP1362_IF_hw.tcl
........\..\........SEG7\hdl\SEG7_IF.v
........\..\............\...\SEG7_IF_hw.tcl
........\..\............\software\SEG7.c
........\..\............\........\SEG7.h
........\ISP1362_IF_0.v
........\jtag_uart_0.v
........\onchip_memory2_0.hex
........\onchip_memory2_0.v
........\pio_button.v

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