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MIPs_caculation

  • Category : VHDL-FPGA-Verilog
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  • Update : 2014-07-08
  • Size : 4.3mb
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Introduction - If you have any usage issues, please Google them yourself
Verilog Number of 32-bit fixed-point arithmetic unit
Packet file list
(Preview for download)


基于MIPS的运算器设计
....................\create_testfile.exe
....................\使用手册.pdf
....................\框图
....................\....\1bitALU.vsd
....................\....\1bitALUDetail.vsd
....................\....\32bitALU.vsd
....................\....\32bitALUdetail.vsd
....................\....\8-bit ALU.vsd
....................\....\div32.vsd
....................\....\mult.vsd
....................\....\乘法器流程.vsd
....................\....\寄存器.vsd
....................\....\引脚图
....................\....\......\ALU.vsd
....................\....\......\slt处理.vsd
....................\....\......\乘法器.vsd
....................\....\......\寄存器堆.vsd
....................\....\......\控制信号.vsd
....................\....\......\标志位处理.vsd
....................\....\......\移位寄存器.vsd
....................\....\......\符号处理.vsd
....................\....\......\符号扩展.vsd
....................\....\......\运算器.vsd
....................\....\......\除法器.vsd
....................\....\运算器数据通路.vsd
....................\....\除法器流程.vsd
....................\源程序
....................\......\C++程序
....................\......\.......\create_testfile
....................\......\.......\...............\Debug
....................\......\.......\...............\.....\StdAfx.obj
....................\......\.......\...............\.....\StdAfx.sbr
....................\......\.......\...............\.....\create_testfile.bsc
....................\......\.......\...............\.....\create_testfile.exe
....................\......\.......\...............\.....\create_testfile.ilk
....................\......\.......\...............\.....\create_testfile.obj
....................\......\.......\...............\.....\create_testfile.pch
....................\......\.......\...............\.....\create_testfile.pdb
....................\......\.......\...............\.....\create_testfile.sbr
....................\......\.......\...............\.....\vc60.idb
....................\......\.......\...............\.....\vc60.pdb
....................\......\.......\...............\ReadMe.txt
....................\......\.......\...............\StdAfx.cpp
....................\......\.......\...............\StdAfx.h
....................\......\.......\...............\create_testfile.cpp
....................\......\.......\...............\create_testfile.dsp
....................\......\.......\...............\create_testfile.dsw
....................\......\.......\...............\create_testfile.ncb
....................\......\.......\...............\create_testfile.opt
....................\......\.......\...............\create_testfile.plg
....................\......\.......\create_testfile.rar
....................\......\.......\shift2
....................\......\.......\......\Debug
....................\......\.......\......\.....\StdAfx.obj
....................\......\.......\......\.....\StdAfx.sbr
....................\......\.......\......\.....\shift2.exe
....................\......\.......\......\.....\shift2.obj
....................\......\.......\......\.....\shift2.pdb
....................\......\.......\......\.....\shift2.sbr
....................\......\.......\......\.....\vc60.pdb
....................\......\.......\......\ReadMe.txt
....................\......\.......\......\StdAfx.cpp
....................\......\.......\......\StdAfx.h
....................\......\.......\......\shift2.cpp
....................\......\.......\......\shift2.dsp
....................\......\.......\......\shift2.dsw
....................\......\.......\......\shift2.ncb
....................\......\.......\......\shift2.opt
....................\......\.......\......\shift2.plg
....................\......\.......\shift2.rar
....................\......\主程序
....................\......\......\alu.v
....................\......\......\alu32.v
....................\......\......\alu8.v
....................\......\......\alucontrl.v
....................\......\......\arithmetic.v
....................\......\......
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