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  • Category : VHDL-FPGA-Verilog
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  • Update : 2014-06-19
  • Size : 286kb
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  • Author :m****
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Introduction - If you have any usage issues, please Google them yourself
this is a 2 bit adder for xilinx with ise 9.2
Packet file list
(Preview for download)


a_sum_b
.......\a_mul_b.bld
.......\a_mul_b.cmd_log
.......\a_mul_b.jhd
.......\a_mul_b.lso
.......\a_mul_b.ngc
.......\a_mul_b.ngd
.......\a_mul_b.ngr
.......\a_mul_b.prj
.......\a_mul_b.sch
.......\a_mul_b.schbak
.......\a_mul_b.schcmd
.......\a_mul_b.stx
.......\a_mul_b.syr
.......\a_mul_b.vhf
.......\a_mul_b.xst
.......\a_mul_b_beh.prj
.......\a_mul_b_envsettings.html
.......\a_mul_b_isim_beh.exe
.......\a_mul_b_isim_beh.wdb
.......\a_mul_b_map.map
.......\a_mul_b_map.mrp
.......\a_mul_b_map.ngm
.......\a_mul_b_ngdbuild.xrpt
.......\a_mul_b_summary.html
.......\a_mul_b_xst.xrpt
.......\a_sum_b.gise
.......\a_sum_b.jhd
.......\a_sum_b.sch
.......\a_sum_b.schlog
.......\a_sum_b.xise
.......\a_sum_b_summary.html
.......\fuse.log
.......\fuse.xmsgs
.......\fuseRelaunch.cmd
.......\isim.cmd
.......\isim.log
.......\sch2HdlBatchFile
.......\webtalk_pn.xml
.......\xilinxsim.ini
.......\ipcore_dir
.......\iseconfig
.......\.........\a_mul_b.xreport
.......\.........\a_sum_b.projectmgr
.......\.........\a_sum_b.xreport
.......\isim
.......\....\isim_usage_statistics.html
.......\....\pn_info
.......\....\a_mul_b_isim_beh.exe.sim
.......\....\........................\a_mul_b_isim_beh.exe
.......\....\........................\isimcrash.log
.......\....\........................\ISimEngine-DesignHierarchy.dbg
.......\....\........................\isimkernel.log
.......\....\........................\netId.dat
.......\....\........................\tmp_save
.......\....\........................\........\_1
.......\....\........................\unisim
.......\....\........................\......\a_2661327437_0605893366.c
.......\....\........................\......\a_2661327437_0605893366.didat
.......\....\........................\......\a_2661327437_0605893366.nt.obj
.......\....\........................\......\p_0947159679.c
.......\....\........................\......\p_0947159679.didat
.......\....\........................\......\p_0947159679.nt.obj
.......\....\........................\work
.......\....\........................\....\a_4010154511_3104622876.c
.......\....\........................\....\a_4010154511_3104622876.didat
.......\....\........................\....\a_4010154511_3104622876.nt.obj
.......\....\........................\....\a_4155462404_3212880686.c
.......\....\........................\....\a_4155462404_3212880686.didat
.......\....\........................\....\a_4155462404_3212880686.nt.obj
.......\....\........................\....\a_mul_b_isim_beh.exe_main.c
.......\....\........................\....\a_mul_b_isim_beh.exe_main.nt.obj
.......\....\precompiled.exe.sim
.......\....\...................\ieee
.......\....\...................\....\p_1242562249.c
.......\....\...................\....\p_1242562249.didat
.......\....\...................\....\p_1242562249.nt.obj
.......\....\...................\....\p_2592010699.c
.......\....\...................\....\p_2592010699.didat
.......\....\...................\....\p_2592010699.nt.obj
.......\....\...................\....\p_3499444699.c
.......\....\...................\....\p_3499444699.didat
.......\....\...................\....\p_3499444699.nt.obj
.......\....\...................\....\p_3620187407.c
.......\....\...................\....\p_3620187407.didat
.......\....\...................\....\p_3620187407.nt.obj
.......\....\work
.......\....\....\add4_hxilinx_a_mul_b.vdb
.......\....\....\a_mul_b.vdb
.......\netgen
.......\......\synthesis
.......\......\.........\a_mul_b_synthesis.nlf
.......\......\.........\a_mul_b_synthesis.vhd
.......\xlnx_auto_0_xdb
.......\...............\cst.xbcd
.......\xst
.......\...\dump.xst
.......\...\........\a_mul_b.prj
.......\...\projnav.tmp
.......\...\work
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