The realization of direct digital frequency synthesis in the Altera FPGA, which is implemented by Verilog DDS, the output sine wave, through the simulation in Modelsim software, already contains all the code and engineering as well as binary stream file.

dds
...\pro
...\sim
...\...\DDS操作说明.doc
...\...\cos_data.dat
...\...\cos_data.txt
...\...\cos_data1.dat
...\...\cos_gen.m
...\...\dds_cos_rom.v
...\...\dds_cos_sin_block.v
...\...\dds_cos_sin_block.v.bak
...\...\dds_phas_acc.v
...\...\dds_sin_rom.v
...\...\fft_analyz_cos.m
...\...\fft_analyz_sin.m
...\...\sin_data.dat
...\...\sin_data.txt
...\...\sin_data1.dat
...\...\sin_gen.m
...\...\tb_dds_cos_sin_block .v
...\...\vsim.wlf
...\...\work
...\...\....\_info
...\...\....\_temp
...\...\....\.....\vlogfj81bw
...\...\....\.....\vlogfw818w
...\...\....\.....\vlogybqkfk
...\...\....\.....\vlogyrrk0k
...\...\....\_vmake
...\...\....\dds_cos_rom
...\...\....\...........\_primary.dat
...\...\....\...........\_primary.dbs
...\...\....\...........\_primary.vhd
...\...\....\...........\verilog.asm
...\...\....\...........\verilog.rw
...\...\....\dds_cos_sin_block
...\...\....\.................\_primary.dat
...\...\....\.................\_primary.dbs
...\...\....\.................\_primary.vhd
...\...\....\.................\verilog.asm
...\...\....\.................\verilog.rw
...\...\....\dds_phas_acc
...\...\....\............\_primary.dat
...\...\....\............\_primary.dbs
...\...\....\............\_primary.vhd
...\...\....\............\verilog.asm
...\...\....\............\verilog.rw
...\...\....\dds_sin_rom
...\...\....\...........\_primary.dat
...\...\....\...........\_primary.dbs
...\...\....\...........\_primary.vhd
...\...\....\...........\verilog.asm
...\...\....\...........\verilog.rw
...\...\....\tb_dds_cos_sin_block
...\...\....\....................\_primary.dat
...\...\....\....................\_primary.dbs
...\...\....\....................\_primary.vhd
...\...\....\....................\verilog.asm
...\...\....\....................\verilog.rw
...\src
...\...\dds_cos_rom.v
...\...\dds_cos_sin_block.v
...\...\dds_phas_acc.v
...\...\dds_sin_rom.v
...\...\pin.tcl
...\...\tb_dds_cos_sin_block .v

• We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please Google on your own.
• The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please contact us.
• Please use Winrar for decompression tools
• If download fail, Try it againg or Feedback to us.
• If downloaded content did not match the introduction, Feedback to us，Confirm and will be refund.
• Before downloading, you can inquire through the uploaded person information

Nothing．