Design using VHDL adder 999 counters, and use the digital scan decode circuit in the digital tube display. Schematic top-level design using

cnt10.acf
cnt10.fit
cnt10.hex
cnt10.hif
cnt10.mmf
cnt10.ndb
cnt10.pin
cnt10.pof
cnt10.rpt
cnt10.scf
cnt10.snf
cnt10.sof
CNT10.sym
cnt10.ttf
cnt10.vhd
cnt1000.acf
cnt1000.fit
cnt1000.gdf
cnt1000.hex
cnt1000.hif
cnt1000.mmf
cnt1000.ndb
cnt1000.pin
cnt1000.pof
cnt1000.rpt
cnt1000.snf
cnt1000.sof
cnt1000.ttf
LIB.DLS
select.acf
select.hif
select.vhd
U1246692.DLS
U3592065.DLS
U3604684.DLS
U3899336.DLS
U6049075.DLS
U8503247.DLS
U9300180.DLS
U9732403.DLS
U9948673.DLS
xz.acf
xz.fit
xz.hex
xz.hif
xz.mmf
xz.ndb
xz.pin
xz.pof
xz.rpt
xz.snf
xz.sof
XZ.sym
xz.ttf
xz.vhd
ym.acf
ym.fit
ym.hex
ym.hif
ym.mmf
ym.ndb
ym.pin
ym.pof
ym.rpt
ym.scf
ym.snf
ym.sof
YM.sym
ym.ttf
ym.vhd

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