fpga, vhdl, de2-70, a digital camera

DE2_70_D5M数字摄像头
....................\DE2_70_D5M_LTM_RGB32
....................\....................\db
....................\....................\..\DE2_70.db_info
....................\....................\..\DE2_70.eco.cdb
....................\....................\..\DE2_70.sld_design_entry.sci
....................\....................\DE2_70.qpf
....................\....................\DE2_70.qsf
....................\....................\DE2_70.qws
....................\....................\DE2_70_assignment_defaults.qdf
....................\....................\hardware
....................\....................\........\CCD_Capture.v
....................\....................\........\DE2_70.v
....................\....................\........\I2C_CCD_Config.v
....................\....................\........\I2C_Controller.v
....................\....................\........\I2S_Controller.v
....................\....................\........\lcd_3wire_config.v
....................\....................\........\Line_Buffer.bsf
....................\....................\........\Line_Buffer.v
....................\....................\........\Line_Buffer_dval.bsf
....................\....................\........\Line_Buffer_dval.v
....................\....................\........\RAW2RGB.v
....................\....................\........\Reset_Delay.v
....................\....................\........\Sdram_Control_4Port
....................\....................\........\...................\command.v
....................\....................\........\...................\control_interface.v
....................\....................\........\...................\Sdram_Control_4Port.v
....................\....................\........\...................\Sdram_FIFO.v
....................\....................\........\...................\Sdram_Params.h
....................\....................\........\...................\Sdram_PLL.bsf
....................\....................\........\...................\Sdram_PLL.ppf
....................\....................\........\...................\Sdram_PLL.v
....................\....................\........\...................\sdr_data_path.v
....................\....................\........\sdram_pll.v
....................\....................\........\SEG7_LUT.v
....................\....................\........\SEG7_LUT_8.v
....................\....................\........\touch_tcon.v
....................\....................\........\vga_pll.v
....................\....................\release
....................\....................\.......\DE2_70.sof

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