Use verilog written, multiple serial communication test signal source for generating multiple test fpga serial signal, configure the external level shifting circuitry can design a multi-channel programmable digital signal source

setb.v
setbb.v
setc.v
setd.v
setdd.v
sete.v
testtop1.v
testtop.v
dsstop.v
out.v
set.v
seta.v

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