Verilog adder

add\add.done
...\add.eda.rpt
...\add.flow.rpt
...\add.map.rpt
...\add.map.summary
...\add.qpf
...\add.qsf
...\add.v
...\add.v.bak
...\add_nativelink_simulation.rpt
...\db\add.cbx.xml
...\..\add.cmp.hdb
...\..\add.cmp.rdb
...\..\add.db_info
...\..\add.eda.qmsg
...\..\add.hier_info
...\..\add.hif
...\..\add.lpc.html
...\..\add.lpc.rdb
...\..\add.lpc.txt
...\..\add.map.cdb
...\..\add.map.hdb
...\..\add.map.logdb
...\..\add.map.qmsg
...\..\add.pre_map.cdb
...\..\add.pre_map.hdb
...\..\add.rtlv.hdb
...\..\add.rtlv_sg.cdb
...\..\add.rtlv_sg_swap.cdb
...\..\add.sgdiff.cdb
...\..\add.sgdiff.hdb
...\..\add.sld_design_entry.sci
...\..\add.sld_design_entry_dsc.sci
...\..\add.smart_action.txt
...\..\add.syn_hier_info
...\..\add.tis_db_list.ddb
...\..\logic_util_heursitic.dat
...\..\prev_cmp_add.qmsg
...\incremental_db\compiled_partitions\add.db_info
...\..............\...................\add.root_partition.map.kpt
...\..............\README
...\simulation\modelsim\add.vt
...\..........\........\add.vt.bak
...\..........\........\add_run_msim_rtl_verilog.do
...\..........\........\add_run_msim_rtl_verilog.do.bak
...\..........\........\msim_transcript
...\..........\........\rtl_work\@_opt\vopt22ajhw
...\..........\........\........\.....\vopt2deniv
...\..........\........\........\.....\vopt664ifv
...\..........\........\........\.....\vopt6z0g2w
...\..........\........\........\.....\vopt9rnczv
...\..........\........\........\.....\voptdyd9dv
...\..........\........\........\.....\voptg7030w
...\..........\........\........\.....\voptgvn6yk
...\..........\........\........\.....\voptkbc3yk
...\..........\........\........\.....\voptkqm00w
...\..........\........\........\.....\voptq7bxzv
...\..........\........\........\.....\voptqq7tmw
...\..........\........\........\.....\voptv7xqmw
...\..........\........\........\.....\voptvd1w7w
...\..........\........\........\.....\voptvq0szv
...\..........\........\........\.....\voptyqikmw
...\..........\........\........\.....\voptz8knkw
...\..........\........\........\.....\voptzjrsmv
...\..........\........\........\.....\_deps
...\..........\........\........\add\_primary.dat
...\..........\........\........\...\_primary.dbs
...\..........\........\........\...\_primary.vhd
...\..........\........\........\..._vlg_tst\_primary.dat
...\..........\........\........\...........\_primary.dbs
...\..........\........\........\...........\_primary.vhd
...\..........\........\........\_info
...\..........\........\........\_vmake
...\..........\........\verilog_libs\altera_mf_ver\@a@l@t@e@r@a_@d@e@v@i@c@e_@f@a@m@i@l@i@e@s\_primary.dat
...\..........\........\............\.............\..........................................\_primary.dbs
...\..........\........\............\.............\..........................................\_primary.vhd
...\..........\........\............\.............\..............m@f_@h@i@n@t_@e@v@a@l@u@a@t@i@o@n\_primary.dat
...\..........\........\............\.............\...............................................\_primary.dbs
...\..........\........\............\.............\...............................................\_primary.vhd
...\..........\........\............\.............\...................m@e@m@o@r@y_@i@n@i@t@i@a@l@i@z@a@t@i@o@n\_primary.dat
...\..........\........\............\.............\...........................................................\_primary.dbs
...\..........\........\............\.............\...........................................................\_primary.vhd
...\..........\........\............\.............\.m@f_cycloneiiigl_m_cntr\_primary.dat
...\..........\........\............\.............\........................\_primary.dbs
...\..........\........\............\.............\........................\_primary.vhd
...\..........\........\............\.............\..................n_cntr\_primary.dat
...\..........\........\............\.............\........................\_primary.dbs
...\..........\........\............\.............\........................\_primary.vhd
...\..........\........\.

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