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VGA_SW_Verilog

  • Category : VHDL-FPGA-Verilog
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  • Update : 2014-04-02
  • Size : 755kb
  • Downloaded :0次
  • Author :wan***
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
VGA IP hard-core design, the output image by a simple control switch, ISE14.6 validation.
Packet file list
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VGA_TEST\iseconfig\MYVGA.xreport
........\.........\VGA_TEST.projectmgr
........\myvga.bgn
........\myvga.bit
........\MyVGA.bld
........\MyVGA.cmd_log
........\myvga.drc
........\MyVGA.lso
........\MyVGA.ncd
........\MyVGA.ngc
........\MyVGA.ngd
........\MyVGA.ngr
........\MyVGA.pad
........\MyVGA.par
........\MyVGA.pcf
........\MyVGA.prj
........\MyVGA.ptwx
........\MyVGA.stx
........\MyVGA.syr
........\MyVGA.twr
........\MyVGA.twx
........\MyVGA.unroutes
........\MyVGA.ut
........\MYVGA.v
........\MyVGA.vhd
........\MyVGA.xpi
........\MyVGA.xst
........\MyVGA_bitgen.xwbt
........\MYVGA_envsettings.html
........\MyVGA_guide.ncd
........\MYVGA_ICF.ucf
........\MyVGA_map.map
........\MyVGA_map.mrp
........\MyVGA_map.ncd
........\MyVGA_map.ngm
........\MyVGA_map.xrpt
........\MyVGA_ngdbuild.xrpt
........\MyVGA_pad.csv
........\MyVGA_pad.txt
........\MyVGA_par.xrpt
........\MYVGA_summary.html
........\MyVGA_summary.xml
........\MyVGA_usage.xml
........\MyVGA_xst.xrpt
........\par_usage_statistics.html
........\usage_statistics_webtalk.html
........\VGA_TEST.gise
........\VGA_TEST.xise
........\webtalk.log
........\webtalk_pn.xml
........\xlnx_auto_0_xdb\cst.xbcd
........\.st\work\work.vdbl
........\...\....\work.vdbx
........\_impact.cmd
........\_impact.log
........\.ngo\netlist.lst
........\.xmsgs\bitgen.xmsgs
........\......\map.xmsgs
........\......\ngdbuild.xmsgs
........\......\par.xmsgs
........\......\pn_parser.xmsgs
........\......\trce.xmsgs
........\......\xst.xmsgs
........\xst\dump.xst\MyVGA.prj
........\...\dump.xst
........\...\projnav.tmp
........\...\work
........\ipcore_dir
........\iseconfig
........\xlnx_auto_0_xdb
........\xst
........\_ngo
........\_xmsgs
VGA_TEST
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