implement 4 bit add using vhdl

ADDER_4_BIT\ADDER_4.asm.rpt
...........\ADDER_4.bdf
...........\ADDER_4.bsf
...........\ADDER_4.done
...........\ADDER_4.fit.rpt
...........\ADDER_4.fit.summary
...........\ADDER_4.flow.rpt
...........\ADDER_4.map.rpt
...........\ADDER_4.map.summary
...........\ADDER_4.pin
...........\ADDER_4.pof
...........\ADDER_4.qpf
...........\ADDER_4.qsf
...........\ADDER_4.qws
...........\ADDER_4.sim.rpt
...........\ADDER_4.sof
...........\ADDER_4.tan.rpt
...........\ADDER_4.tan.summary
...........\ADDER_4.vwf
...........\db\ADDER_4.asm.qmsg
...........\..\ADDER_4.cbx.xml
...........\..\ADDER_4.cmp.cdb
...........\..\ADDER_4.cmp.hdb
...........\..\ADDER_4.cmp.logdb
...........\..\ADDER_4.cmp.rdb
...........\..\ADDER_4.cmp.tdb
...........\..\ADDER_4.cmp0.ddb
...........\..\ADDER_4.dbp
...........\..\ADDER_4.db_info
...........\..\ADDER_4.eco.cdb
...........\..\ADDER_4.eds_overflow
...........\..\ADDER_4.fit.qmsg
...........\..\ADDER_4.fnsim.cdb
...........\..\ADDER_4.fnsim.hdb
...........\..\ADDER_4.fnsim.qmsg
...........\..\ADDER_4.hier_info
...........\..\ADDER_4.hif
...........\..\ADDER_4.map.cdb
...........\..\ADDER_4.map.hdb
...........\..\ADDER_4.map.logdb
...........\..\ADDER_4.map.qmsg
...........\..\ADDER_4.pre_map.cdb
...........\..\ADDER_4.pre_map.hdb
...........\..\ADDER_4.psp
...........\..\ADDER_4.pss
...........\..\ADDER_4.rtlv.hdb
...........\..\ADDER_4.rtlv_sg.cdb
...........\..\ADDER_4.rtlv_sg_swap.cdb
...........\..\ADDER_4.sgdiff.cdb
...........\..\ADDER_4.sgdiff.hdb
...........\..\ADDER_4.sim.cvwf
...........\..\ADDER_4.sim.hdb
...........\..\ADDER_4.sim.qmsg
...........\..\ADDER_4.sim.rdb
...........\..\ADDER_4.sld_design_entry.sci
...........\..\ADDER_4.sld_design_entry_dsc.sci
...........\..\ADDER_4.syn_hier_info
...........\..\ADDER_4.tan.qmsg
...........\..\prev_cmp_ADDER_4.sim.qmsg
...........\..\wed.wsf
...........\F_A.bdf
...........\F_A.bsf
...........\prev_cmp_ADDER_4.qmsg
...........\db
ADDER_4_BIT

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