Digital clock design, the system is divided into five modules, Freq_div module, Clock_cnt module, Clock_ctl module, Key_ctl module and Display Module. System goal: 8 LED display time as 9:25:10 displayed as ,09-25-10. (2) Set two buttons SET button for mode selection button when UP for school.

digital_clock\Clock_cnt.v
.............\Clock_cnt.v.bak
.............\Clock_ctl.v
.............\Clock_ctl.v.bak
.............\db\add_sub_4rh.tdf
.............\..\add_sub_7rh.tdf
.............\..\add_sub_nsh.tdf
.............\..\digital_clock.ace_cmp.bpm
.............\..\digital_clock.ace_cmp.cdb
.............\..\digital_clock.ace_cmp.ecobp
.............\..\digital_clock.ace_cmp.hdb
.............\..\digital_clock.ae.hdb
.............\..\digital_clock.asm.qmsg
.............\..\digital_clock.asm.rdb
.............\..\digital_clock.atom.rvd
.............\..\digital_clock.atom_map.rvd
.............\..\digital_clock.cbx.xml
.............\..\digital_clock.cmp.bpm
.............\..\digital_clock.cmp.cdb
.............\..\digital_clock.cmp.ecobp
.............\..\digital_clock.cmp.hdb
.............\..\digital_clock.cmp.kpt
.............\..\digital_clock.cmp.logdb
.............\..\digital_clock.cmp.rdb
.............\..\digital_clock.cmp.tdb
.............\..\digital_clock.cmp0.ddb
.............\..\digital_clock.cmp_merge.kpt
.............\..\digital_clock.db_info
.............\..\digital_clock.eco.cdb
.............\..\digital_clock.eda.qmsg
.............\..\digital_clock.eds_overflow
.............\..\digital_clock.fit.qmsg
.............\..\digital_clock.fnsim.hdb
.............\..\digital_clock.fnsim.qmsg
.............\..\digital_clock.hier_info
.............\..\digital_clock.hif
.............\..\digital_clock.lfp.cdb
.............\..\digital_clock.lpc.html
.............\..\digital_clock.lpc.rdb
.............\..\digital_clock.lpc.txt
.............\..\digital_clock.map.bpm
.............\..\digital_clock.map.cdb
.............\..\digital_clock.map.ecobp
.............\..\digital_clock.map.hdb
.............\..\digital_clock.map.kpt
.............\..\digital_clock.map.logdb
.............\..\digital_clock.map.qmsg
.............\..\digital_clock.map_bb.cdb
.............\..\digital_clock.map_bb.hdb
.............\..\digital_clock.map_bb.logdb
.............\..\digital_clock.pre_map.cdb
.............\..\digital_clock.pre_map.hdb
.............\..\digital_clock.rpp.qmsg
.............\..\digital_clock.rtlv.hdb
.............\..\digital_clock.rtlv_sg.cdb
.............\..\digital_clock.rtlv_sg_swap.cdb
.............\..\digital_clock.sgate.rvd
.............\..\digital_clock.sgate_sm.rvd
.............\..\digital_clock.sgdiff.cdb
.............\..\digital_clock.sgdiff.hdb
.............\..\digital_clock.sim.cvwf
.............\..\digital_clock.sim.hdb
.............\..\digital_clock.sim.qmsg
.............\..\digital_clock.sim.rdb
.............\..\digital_clock.simfam
.............\..\digital_clock.sld_design_entry.sci
.............\..\digital_clock.sld_design_entry_dsc.sci
.............\..\digital_clock.smart_action.txt
.............\..\digital_clock.smp_dump.txt
.............\..\digital_clock.syn_hier_info
.............\..\digital_clock.tan.qmsg
.............\..\digital_clock.tis_db_list.ddb
.............\..\digitial_clock.db_info
.............\..\digitial_clock.eco.cdb
.............\..\digitial_clock.sld_design_entry.sci
.............\..\logic_util_heursitic.dat
.............\..\prev_cmp_digital_clock.asm.qmsg
.............\..\prev_cmp_digital_clock.fit.qmsg
.............\..\prev_cmp_digital_clock.map.qmsg
.............\..\prev_cmp_digital_clock.qmsg
.............\..\prev_cmp_digital_clock.sim.qmsg
.............\..\prev_cmp_digital_clock.tan.qmsg
.............\..\wed.wsf
.............\digital_clock.asm.rpt
.............\digital_clock.bdf
.............\digital_clock.done
.............\digital_clock.dpf
.............\digital_clock.eda.rpt
.............\digital_clock.fit.rpt
.............\digital_clock.fit.smsg
.............\digital_clock.fit.summary
.............\digital_clock.flow.rpt
.............\digital_clock.map.rpt
.............\digital_clock.map.summary
.............\digital_clock.pin
.............\digital_clock.pof
.............\digital_clock.qpf
.............\digital_clock.qsf
.............\digital_clock.qws
.............\digital_clock.sim.rpt

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