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Frecuency-Divisor

  • Category : VHDL-FPGA-Verilog
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  • Update : 2014-03-11
  • Size : 129kb
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  • Author :dok***
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Introduction - If you have any usage issues, please Google them yourself
This code Use the 50 Mhz clock of BASYS 2 FPGA to generate a frecuency divisor (choose the div value using FPGA Switches). The result is shown in two leds to compare, one have a frecency fixed (with out div ) and the secon led showm the div selected (by switches), working.
Packet file list
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DivisorFrecuencia\Contador.bmm
.................\Contador.v
.................\divisor.bgn
.................\divisor.bit
.................\Divisor.bld
.................\Divisor.cmd_log
.................\divisor.drc
.................\Divisor.lso
.................\Divisor.ncd
.................\Divisor.ngc
.................\Divisor.ngd
.................\Divisor.ngr
.................\Divisor.pad
.................\Divisor.par
.................\Divisor.pcf
.................\Divisor.prj
.................\Divisor.ptwx
.................\Divisor.stx
.................\Divisor.syr
.................\Divisor.twr
.................\Divisor.twx
.................\Divisor.unroutes
.................\Divisor.ut
.................\Divisor.v
.................\Divisor.xpi
.................\Divisor.xst
.................\DivisorFrecuencia.gise
.................\DivisorFrecuencia.xise
.................\Divisor_bitgen.xwbt
.................\Divisor_envsettings.html
.................\Divisor_guide.ncd
.................\Divisor_map.map
.................\Divisor_map.mrp
.................\Divisor_map.ncd
.................\Divisor_map.ngm
.................\Divisor_map.xrpt
.................\Divisor_ngdbuild.xrpt
.................\Divisor_pad.csv
.................\Divisor_pad.txt
.................\Divisor_par.xrpt
.................\Divisor_summary.html
.................\Divisor_summary.xml
.................\Divisor_usage.xml
.................\Divisor_utf.ucf
.................\Divisor_xst.xrpt
.................\iseconfig\Divisor.xreport
.................\.........\DivisorFrecuencia.projectmgr
.................\Multiplexor8a1.v
.................\usage_statistics_webtalk.html
.................\webtalk.log
.................\webtalk_pn.xml
.................\xlnx_auto_0_xdb\cst.xbcd
.................\.st\work\hdllib.ref
.................\...\....\vlg54\_divisor.bin
.................\...\....\....B\_multiplexor8a1.bin
.................\...\....\...66\_contador.bin
.................\_ngo\netlist.lst
.................\.xmsgs\bitgen.xmsgs
.................\......\map.xmsgs
.................\......\ngdbuild.xmsgs
.................\......\par.xmsgs
.................\......\pn_parser.xmsgs
.................\......\trce.xmsgs
.................\......\xst.xmsgs
.................\xst\dump.xst\Divisor.prj\ngx\notopt
.................\...\........\...........\...\opt
.................\...\........\...........\ngx
.................\...\........\Divisor.prj
.................\...\work\vlg54
.................\...\....\vlg5B
.................\...\....\vlg66
.................\...\dump.xst
.................\...\projnav.tmp
.................\...\work
.................\ipcore_dir
.................\iseconfig
.................\xlnx_auto_0_xdb
.................\xst
.................\_ngo
.................\_xmsgs
DivisorFrecuencia
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