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CameraLink_Oserdes2_test

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  • Update : 2014-02-25
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Introduction - If you have any usage issues, please Google them yourself
input 40M o clock and output 960M
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CameraLink_Oserdes2_test\CameraLink_Oserdes2_test.gise
........................\CameraLink_Oserdes2_test.xise
........................\Cameralink_out.vhd
........................\CCD_Gen5Kx4K.v
........................\ipcore_dir\CLK_IN_PLL\CLK_IN_PLL.ucf
........................\..........\..........\CLK_IN_PLL.xdc
........................\..........\..........\clk_wiz_v3_3_readme.txt
........................\..........\..........\doc\clk_wiz_ds709.pdf
........................\..........\..........\...\clk_wiz_gsg521.pdf
........................\..........\..........\...\clk_wiz_v3_3_readme.txt
........................\..........\..........\...\clk_wiz_v3_3_vinfo.html
........................\..........\..........\example_design\CLK_IN_PLL_exdes.vhd
........................\..........\..........\implement\implement.bat
........................\..........\..........\.........\implement.sh
........................\..........\..........\.........\planAhead_ise.bat
........................\..........\..........\.........\planAhead_ise.sh
........................\..........\..........\.........\planAhead_ise.tcl
........................\..........\..........\.........\planAhead_rdn.bat
........................\..........\..........\.........\planAhead_rdn.sh
........................\..........\..........\.........\planAhead_rdn.tcl
........................\..........\..........\.........\xst.prj
........................\..........\..........\.........\xst.scr
........................\..........\..........\simulation\CLK_IN_PLL_tb.vhd
........................\..........\..........\..........\functional\simcmds.tcl
........................\..........\..........\..........\..........\simulate_isim.bat
........................\..........\..........\..........\..........\simulate_isim.sh
........................\..........\..........\..........\..........\simulate_mti.do
........................\..........\..........\..........\..........\simulate_ncsim.sh
........................\..........\..........\..........\..........\simulate_vcs.sh
........................\..........\..........\..........\..........\wave.do
........................\..........\..........\..........\..........\wave.sv
........................\..........\..........\..........\timing\CLK_IN_PLL_tb.vhd
........................\..........\..........\..........\......\sdf_cmd_file
........................\..........\..........\..........\......\simcmds.tcl
........................\..........\..........\..........\......\simulate_isim.sh
........................\..........\..........\..........\......\simulate_mti.do
........................\..........\..........\..........\......\simulate_ncsim.sh
........................\..........\..........\..........\......\simulate_vcs.sh
........................\..........\..........\..........\......\ucli_commands.key
........................\..........\..........\..........\......\vcs_session.tcl
........................\..........\..........\..........\......\wave.do
........................\..........\CLK_IN_PLL.asy
........................\..........\CLK_IN_PLL.ejp
........................\..........\CLK_IN_PLL.gise
........................\..........\CLK_IN_PLL.sym
........................\..........\CLK_IN_PLL.vhd
........................\..........\CLK_IN_PLL.vho
........................\..........\CLK_IN_PLL.xco
........................\..........\CLK_IN_PLL.xise
........................\..........\CLK_IN_PLL_exdes.ncf
........................\..........\CLK_IN_PLL_flist.txt
........................\..........\CLK_IN_PLL_xmdf.tcl
........................\..........\.._Transmitter\doc\selectio_wiz_ds746.pdf
........................\..........\..............\...\selectio_wiz_gsg700.pdf
........................\..........\..............\...\selectio_wiz_v3_3_readme.txt
........................\..........\..............\...\selectio_wiz_v3_3_vinfo.html
........................\..........\..............\example_design\CL_Transmitter_exdes.vhd
........................\..........\..............\implement\implement.ba
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