It is a verilog program of SD read-write. it is in DE2 board

sd_test\.sopc_builder\filters.xml
.......\.............\install.ptf
.......\.............\install2.ptf
.......\.............\preferences.xml
.......\altpllpll_0.v
.......\altpll_0.v
.......\cpu_0.ocp
.......\cpu_0.sdc
.......\cpu_0.v
.......\cpu_0_ic_tag_ram.mif
.......\cpu_0_jtag_debug_module_sysclk.v
.......\cpu_0_jtag_debug_module_tck.v
.......\cpu_0_jtag_debug_module_wrapper.v
.......\cpu_0_mult_cell.v
.......\cpu_0_ociram_default_contents.mif
.......\cpu_0_oci_test_bench.v
.......\cpu_0_rf_ram_a.mif
.......\cpu_0_rf_ram_b.mif
.......\cpu_0_test_bench.v
.......\db\altsyncram_9tl1.tdf
.......\..\altsyncram_b5g1.tdf
.......\..\altsyncram_c572.tdf
.......\..\altsyncram_e502.tdf
.......\..\altsyncram_irf1.tdf
.......\..\altsyncram_jrf1.tdf
.......\..\altsyncram_qed1.tdf
.......\..\altsyncram_u3c1.tdf
.......\..\a_dpfifo_8t21.tdf
.......\..\a_fefifo_7cf.tdf
.......\..\cntr_fjb.tdf
.......\..\cntr_rj7.tdf
.......\..\ded_mult_2o81.tdf
.......\..\dffpipe_93c.tdf
.......\..\dpram_5h21.tdf
.......\..\logic_util_heursitic.dat
.......\..\mult_add_4cr2.tdf
.......\..\mult_add_6cr2.tdf
.......\..\prev_cmp_SD_test.asm.qmsg
.......\..\prev_cmp_SD_test.eda.qmsg
.......\..\prev_cmp_SD_test.fit.qmsg
.......\..\prev_cmp_SD_test.map.qmsg
.......\..\prev_cmp_SD_test.qmsg
.......\..\prev_cmp_SD_test.tan.qmsg
.......\..\scfifo_1n21.tdf
.......\..\SD_test.asm.qmsg
.......\..\SD_test.asm.rdb
.......\..\SD_test.cbx.xml
.......\..\SD_test.cmp.cbp
.......\..\SD_test.cmp.ecobp
.......\..\SD_test.cmp.kpt
.......\..\SD_test.cmp.rdb
.......\..\SD_test.cmp0.ddb
.......\..\SD_test.cmp_merge.kpt
.......\..\SD_test.db_info
.......\..\SD_test.eco.cdb
.......\..\SD_test.eda.qmsg
.......\..\SD_test.fit.qmsg
.......\..\SD_test.hier_info
.......\..\SD_test.hif
.......\..\SD_test.lpc.html
.......\..\SD_test.lpc.rdb
.......\..\SD_test.lpc.txt
.......\..\SD_test.map.cbp
.......\..\SD_test.map.ecobp
.......\..\SD_test.map.kpt
.......\..\SD_test.map.qmsg
.......\..\SD_test.map_bb.hdb
.......\..\SD_test.pre_map.cdb
.......\..\SD_test.pre_map.hdb
.......\..\SD_test.rpp.qmsg
.......\..\SD_test.rtlv.hdb
.......\..\SD_test.rtlv_sg.cdb
.......\..\SD_test.rtlv_sg_swap.cdb
.......\..\SD_test.sgate.rvd
.......\..\SD_test.sgate_sm.rvd
.......\..\SD_test.sgdiff.cdb
.......\..\SD_test.sgdiff.hdb
.......\..\SD_test.sld_design_entry.sci
.......\..\SD_test.sld_design_entry_dsc.sci
.......\..\SD_test.smart_action.txt
.......\..\SD_test.smp_dump.txt
.......\..\SD_test.syn_hier_info
.......\..\SD_test.tan.qmsg
.......\..\SD_test.tis_db_list.ddb
.......\incremental_db\compiled_partitions\SD_test.autoh_e4eb58185d954d358c52b26e0df67201.map.cdb
.......\..............\...................\SD_test.autoh_e4eb58185d954d358c52b26e0df67201.map.dpi
.......\..............\...................\SD_test.autoh_e4eb58185d954d358c52b26e0df67201.map.hdb
.......\..............\...................\SD_test.autoh_e4eb58185d954d358c52b26e0df67201.map.kpt
.......\..............\...................\SD_test.autoh_e4eb58185d954d358c52b26e0df67201.map.logdb
.......\..............\...................\SD_test.root_partition.cmp.cdb
.......\..............\...................\SD_test.root_partition.cmp.dfp
.......\..............\...................\SD_test.root_partition.cmp.hdb
.......\..............\...................\SD_test.root_partition.cmp.kpt
.......\..............\...................\SD_test.root_partition.cmp.logdb
.......\..............\...................\SD_test.root_partition.cmp.rcfdb
.......\..............\...................\SD_test.root_partition.cmp.re.rcfdb
.......\..............\...................\SD_test.root_partition.map.cdb
.......\..............\...................\SD_test.root_partition.map.dpi
.......\..............\...................\SD_test.root_partition.map.dpi.tmp
.......\..............\...................\SD_test.root_partition.map.hdb

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