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EDA-test-models

  • Category : VHDL-FPGA-Verilog
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  • Update : 2014-02-06
  • Size : 191kb
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  • Author :yhs***
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Introduction - If you have any usage issues, please Google them yourself
Commonly used in the experiment module EDA
Packet file list
(Preview for download)


EDA实验中用到的常用模块\Verilog版本\ASCII\ASCII.hex
.......................\...........\correlator_test\correlator_test.bsf
.......................\...........\...............\correlator_test.v
.......................\...........\.rc5_test\crc5_test.bsf
.......................\...........\.........\crc5_test.v
.......................\...........\dac_test\dac_test.bsf
.......................\...........\........\dac_test.v
.......................\...........\.ds_rom\dds_rom.mif
.......................\...........\....test\dds_test.v
.......................\...........\fft_test\for QuickEDA\fft_test.tcl
.......................\...........\........\.........SOPC-1C12\fft_test.tcl
.......................\...........\........\................6\fft_test.tcl
.......................\...........\.ilter_200us\filter_200us.bsf
.......................\...........\............\filter_200us.v
.......................\...........\image\image.hex
.......................\...........\.nt_div\int_div.bsf
.......................\...........\.......\int_div.v
.......................\...........\key_led\key_led.bsf
.......................\...........\.......\key_led.v
.......................\...........\logic_synsz\for QuickEDA\logic_synsz.tcl
.......................\...........\...........\.........SOPC-1C12\logic_synsz.tcl
.......................\...........\...........\................6\logic_synsz.tcl
.......................\...........\...o\logo.hex
.......................\...........\moto_test\moto_test.bsf
.......................\...........\.........\moto_test.v
.......................\...........\..use_ico\mouse_ico.hex
.......................\...........\ps2_keyboard_test\for QuickEDA\ps2_keyboard_test.tcl
.......................\...........\.................\.........SOPC-1C12\ps2_keyboard_test.tcl
.......................\...........\.................\................6\ps2_keyboard_test.tcl
.......................\...........\....mouse_test\for QuickEDA\ps2_mouse_test.tcl
.......................\...........\..............\.........SOPC-1C12\ps2_mouse_test.tcl
.......................\...........\..............\................6\ps2_mouse_test.tcl
.......................\...........\schk_test\schk_test.bsf
.......................\...........\.........\schk_test.v
.......................\...........\.ine\sine.mif
.......................\...........\...._test\sine_test.bsf
.......................\...........\.........\sine_test.v
.......................\...........\uart_test\uart_test.bsf
.......................\...........\.........\uart_test.v
.......................\...........\vga_display\for QuickEDA\vga_display.tcl
.......................\...........\...........\.........SOPC-1C12\vga_display.tcl
.......................\...........\...........\................6\vga_display.tcl
.......................\...........\....logic\vga_logic.vqm
.......................\.HDL版本\ASCII\ASCII.hex
.......................\........\correlator_test\correlator_test.bsf
.......................\........\...............\correlator_test.vhd
.......................\........\.rc5_test\crc5_test.bsf
.......................\........\.........\crc5_test.vhd
.......................\........\dac_test\dac_test.bsf
.......................\........\........\dac_test.vhd
.......................\........\.ds_rom\dds_rom.mif
.......................\........\....test\dds_test.bsf
.......................\........\........\dds_test.vhd
.......................\........\filter_200us\filter_200us.bsf
.......................\........\............\filter_200us.vhd
.......................\........\image\image.hex
.......................\........\.nt_div\int_div.bsf
.......................\........\.......\int_div.vhd
.......................\........\key_led\key_led.bsf
.......................\........\.......\key_led.vhd
.......................\........\logic_synsz\for QuickEDA\logic_synsz.tcl
.......................\........\...........\.........SOPC-1C12\logic_synsz.tcl
.......................\........\...........\................6\logic_synsz.tcl
....................
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