this compressed file basically contains 5 type of cpu simulations in VHDL code. 1. basic cpu 2. pipelin cpu 3. parwan 4. j1 and j2 cpus 5. j1 and j2 with JTSG port

Multiprocessor&jtag.vhd
Multiprocessor_Two_J2.vhd
parwan.vhd
Pipeline_cpu.vhd
Base_cpu.vhd

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