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ALINX9226_DB4CE15

  • Category : VHDL-FPGA-Verilog
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  • Update : 2013-12-06
  • Size : 380kb
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  • Author :郑***
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Introduction - If you have any usage issues, please Google them yourself
This the AD9226 driver, 12-bit AD conversion rate can reach 65M, FPGA using Altera' s chips believe you can find what you want.
Packet file list
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ALINX9226_DB4CE15
.................\ALINX9226_DB4CE15_restored
.................\..........................\AD.bsf
.................\..........................\AD.v
.................\..........................\AD.v.bak
.................\..........................\AD1.v
.................\..........................\AD1.v.bak
.................\..........................\ADDA.asm.rpt
.................\..........................\ADDA.bdf
.................\..........................\ADDA.done
.................\..........................\ADDA.fit.rpt
.................\..........................\ADDA.fit.smsg
.................\..........................\ADDA.fit.summary
.................\..........................\ADDA.flow.rpt
.................\..........................\ADDA.jdi
.................\..........................\ADDA.map.rpt
.................\..........................\ADDA.map.summary
.................\..........................\ADDA.merge.rpt
.................\..........................\ADDA.pin
.................\..........................\ADDA.pof
.................\..........................\ADDA.qpf
.................\..........................\ADDA.qsf
.................\..........................\ADDA.restore.rpt
.................\..........................\ADDA.sof
.................\..........................\ADDA.sta.rpt
.................\..........................\ADDA.sta.summary
.................\..........................\ADDA.tcl
.................\..........................\ADDA_assignment_defaults.qdf
.................\..........................\cpu1.sdc
.................\..........................\cpu2.sdc
.................\..........................\DA.v
.................\..........................\db
.................\..........................\greybox_tmp
.................\..........................\...........\cbx_args.txt
.................\..........................\incremental_db
.................\..........................\multiprocessors.sopc
.................\..........................\pll.bsf
.................\..........................\pll.ppf
.................\..........................\pll.qip
.................\..........................\pll.v
.................\..........................\pll_bb.v
.................\..........................\SIGN.bsf
.................\..........................\SIGN.inc
.................\..........................\SIGN.qip
.................\..........................\SIGN.v
.................\..........................\SIGN1.bsf
.................\..........................\SIGN1.qip
.................\..........................\SIGN1.v
.................\..........................\SIGN1_bb.v
.................\..........................\SIGN_bb.v
.................\..........................\SIN.qip
.................\..........................\SIN.v
.................\..........................\sopc_add_qip_file.tcl
.................\..........................\stp1.stp
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