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full_adeeeder

  • Category : VHDL-FPGA-Verilog
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  • Update : 2013-12-01
  • Size : 316kb
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  • Author :叶***
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Introduction - If you have any usage issues, please Google them yourself
A full adder example on FPGA program, through the test, can be run directly on the FPGA development board.
Packet file list
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full_adder
..........\db
..........\..\full_adder.amm.cdb
..........\..\full_adder.asm.qmsg
..........\..\full_adder.asm.rdb
..........\..\full_adder.asm_labs.ddb
..........\..\full_adder.cbx.xml
..........\..\full_adder.cmp.bpm
..........\..\full_adder.cmp.cdb
..........\..\full_adder.cmp.hdb
..........\..\full_adder.cmp.kpt
..........\..\full_adder.cmp.logdb
..........\..\full_adder.cmp.rdb
..........\..\full_adder.cmp0.ddb
..........\..\full_adder.cmp1.ddb
..........\..\full_adder.cmp2.ddb
..........\..\full_adder.cmp_merge.kpt
..........\..\full_adder.db_info
..........\..\full_adder.fit.qmsg
..........\..\full_adder.hier_info
..........\..\full_adder.hif
..........\..\full_adder.idb.cdb
..........\..\full_adder.lpc.html
..........\..\full_adder.lpc.rdb
..........\..\full_adder.lpc.txt
..........\..\full_adder.map.bpm
..........\..\full_adder.map.cdb
..........\..\full_adder.map.hdb
..........\..\full_adder.map.kpt
..........\..\full_adder.map.logdb
..........\..\full_adder.map.qmsg
..........\..\full_adder.map_bb.cdb
..........\..\full_adder.map_bb.hdb
..........\..\full_adder.map_bb.logdb
..........\..\full_adder.pre_map.cdb
..........\..\full_adder.pre_map.hdb
..........\..\full_adder.rtlv.hdb
..........\..\full_adder.rtlv_sg.cdb
..........\..\full_adder.rtlv_sg_swap.cdb
..........\..\full_adder.sgdiff.cdb
..........\..\full_adder.sgdiff.hdb
..........\..\full_adder.sld_design_entry.sci
..........\..\full_adder.sld_design_entry_dsc.sci
..........\..\full_adder.smart_action.txt
..........\..\full_adder.sta.qmsg
..........\..\full_adder.sta.rdb
..........\..\full_adder.sta_cmp.8_slow.tdb
..........\..\full_adder.syn_hier_info
..........\..\full_adder.tis_db_list.ddb
..........\..\full_adder.tmw_info
..........\..\logic_util_heursitic.dat
..........\..\prev_cmp_full_adder.qmsg
..........\full_adder.asm.rpt
..........\full_adder.done
..........\full_adder.fit.rpt
..........\full_adder.fit.smsg
..........\full_adder.fit.summary
..........\full_adder.flow.rpt
..........\full_adder.map.rpt
..........\full_adder.map.summary
..........\full_adder.pin
..........\full_adder.pof
..........\full_adder.qpf
..........\full_adder.qsf
..........\full_adder.qws
..........\full_adder.sof
..........\full_adder.sta.rpt
..........\full_adder.sta.summary
..........\full_adder.v
..........\full_adder.v.bak
..........\full_adder_assignment_defaults.qdf
..........\half_adder.v
..........\incremental_db
..........\..............\compiled_partitions
..........\..............\...................\full_adder.db_info
..........\..............\...................\full_adder.root_partition.cmp.cdb
..........\..............\...................\full_adder.root_partition.cmp.dfp
..........\..............\...................\full_adder.root_partition.cmp.hdb
..........\..............\...................\full_adder.root_partition.cmp.kpt
..........\..............\...................\full_adder.root_partition.cmp.logdb
..........\..............\...................\full_adder.root_partition.cmp.rcfdb
..........\..............\...................\full_adder.root_partition.map.cdb
..........\..............\...................\full_adder.root_partition.map.dpi
..........\..............\...................\full_adder.root_partition.map.hbdb.cdb
..........\..............\...................\full_adder.root_partition.map.hbdb.hb_info
..........\..............\...................\full_adder.root_partition.map.hbdb.hdb
..........\..............\...................\full_adder.root_partition.map.hbdb.sig
..........\..............\...................\full_adder.root_partition.map.hdb
..........\..............\...................\full_adder.root_partition.map.kpt
..........\..............\README
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