Verilog implementation of 8 bit computer for FPGA

Bonus Lab Test Version\assembler - Copy.c
......................\assembler.c
......................\assemblerdraft.txt
......................\assemblerdraft2.txt
......................\assemblerdraft3.txt
......................\computer
......................\........\.lso
......................\........\_xmsgs
......................\........\......\pn_parser.xmsgs
......................\........\alu1.cmd_log
......................\........\alu1.jhd
......................\........\alu1.sch
......................\........\alu1.sym
......................\........\alu1.vf
......................\........\alu1_summary.html
......................\........\alu1_tbw.v
......................\........\alu16.cmd_log
......................\........\alu16.jhd
......................\........\alu16.sch
......................\........\alu16.sym
......................\........\alu16.vf
......................\........\alu16_alu16_sch_tb_isim_beh.exe
......................\........\alu16_alu16_sch_tb_stx_beh.prj
......................\........\alu16_isim_beh1.wdb
......................\........\alu16_summary.html
......................\........\alu16_tbw.v
......................\........\alu4.cmd_log
......................\........\alu4.jhd
......................\........\alu4.sch
......................\........\alu4.sym
......................\........\alu4.vf
......................\........\alu4_summary.html
......................\........\alu4_tbw.v
......................\........\alu4overflowcheck.cmd_log
......................\........\alu4overflowcheck.jhd
......................\........\alu4overflowcheck.sch
......................\........\alu4overflowcheck.sym
......................\........\alu4overflowcheck.vf
......................\........\arithm.jhd
......................\........\arithm.sch
......................\........\arithm.sym
......................\........\arithm.vf
......................\........\BRNCH_CONTROL.cmd_log
......................\........\BRNCH_CONTROL.prj
......................\........\BRNCH_CONTROL.spl
......................\........\BRNCH_CONTROL.stx
......................\........\BRNCH_CONTROL.sym
......................\........\BRNCH_CONTROL.v
......................\........\BRNCH_CONTROL.xst
......................\........\BRNCH_CONTROL_isim_beh.exe
......................\........\BRNCH_CONTROL_stx_beh.prj
......................\........\BRNCH_CONTROL_tbw.v
......................\........\BRNCH_CONTROL_tbw_isim_beh.exe
......................\........\computer.cmd_log
......................\........\computer.gise
......................\........\computer.jhd
......................\........\computer.sch
......................\........\computer.schlog
......................\........\computer.sym
......................\........\computer.vf
......................\........\computer.xise
......................\........\computer_computer_sch_tb_beh.prj
......................\........\computer_computer_sch_tb_isim_beh.exe
......................\........\computer_computer_sch_tb_isim_beh.wdb
......................\........\computer_computer_sch_tb_isim_beh1.wdb
......................\........\computer_computer_sch_tb_isim_beh2.wdb
......................\........\computer_computer_sch_tb_stx_beh.prj
......................\........\computer_summary.html
......................\........\computer_tbw.v
......................\........\Control.cmd_log
......................\........\Control.jhd
......................\........\Control.sch
......................\........\Control.schlog
......................\........\Control.sym
......................\........\Control.vf
......................\........\Control_Control_sch_tb_beh.prj
......................\........\Control_Control_sch_tb_isim_beh.exe
......................\........\Control_Control_sch_tb_isim_beh.wdb
......................\........\Control_Control_sch_tb_stx_beh.prj
......................\........\Control_drc.vf
......................\........\Control_isim_beh.exe
......................\........\Control_tbw.v
......................\........\DataMemo

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