CodeBus
www.codebus.net
Search
Sign in
Sign up
Hot Search :
Source
embeded
web
remote control
p2p
game
More...
Location :
Home
Downloads
SourceCode
Embeded-SCM Develop
VHDL-FPGA-Verilog
Main Category
SourceCode
Web Code
Develop Tools
Document
Other resource
Verilog-Template
Favorite
Report
Category :
VHDL-FPGA-Verilog
Tags :
Update : 2013-10-11
Size : 13kb
Downloaded :0次
Author :
s****
About : Nobody
PS : If download it fails, try it again. Download again for free!
Download1
Download2
Don't use download software fo downloading.
If download fail,Try it again for free.
Introduction - If you have any usage issues, please Google them yourself
Reedit
verilog examples of commonly used function modules, the code can be directly copied using
Packet file list
(Preview for download)
Verilog Template\DCM时钟管理.v
................\TB复位信号产生.V
................\verilog.v
................\三段式有限状态机.v
................\串口发送波特率产生.v
................\串口接受波特率产生.V
................\信号边沿检测.v
................\典型的模块组成方式.v
................\双向端口设计.v
................\定时器和计数器.v
................\异步复位-同步释放.v
................\输入信号的时钟同步.v
Verilog Template
Related instructions
We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please
Google on your own.
The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please
contact us
.
Please use
Winrar
for decompression tools
If download fail, Try it againg or
Feedback to us
.
If downloaded content did not match the introduction,
Feedback
to us,Confirm and will be refund.
Before downloading, you can inquire through the uploaded person information
Comment
All comment
Nothing.
Post Comment
*
Quick comment
Recommend
Not bad
Password
Unclear description
Not source
Lost files
Unable to decompress
Bad
*
Content :
*
Captcha :
CodeBus
is one of the largest source code repositories on the Internet!
Contact us :
1999-2046
CodeBus
All Rights Reserved.